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[85.214.62.61]) by mx.google.com with ESMTPS id a640c23a62f3a-a8383970da3si873537366b.836.2024.08.21.04.02.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Aug 2024 04:02:19 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BD86488D0F; Wed, 21 Aug 2024 13:00:18 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id B1CDE88DCD; Wed, 21 Aug 2024 13:00:17 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED, SPF_HELO_NONE,SPF_SOFTFAIL,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 0D33588DB8 for ; Wed, 21 Aug 2024 13:00:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88436DA7; Wed, 21 Aug 2024 04:00:37 -0700 (PDT) Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2740A3F73B; Wed, 21 Aug 2024 04:00:07 -0700 (PDT) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Simon Glass , Tom Rini , Ilias Apalodimas , Heinrich Schuchardt , Marek Vasut , Mark Kettenis , Michal Simek , Patrick DELAUNAY , Patrice CHOTARD , Sughosh Ganu Subject: [PATCH v3 19/27] sandbox: move the TCG event log to the start of ram memory Date: Wed, 21 Aug 2024 16:28:31 +0530 Message-Id: <20240821105839.2870293-20-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240821105839.2870293-1-sughosh.ganu@linaro.org> References: <20240821105839.2870293-1-sughosh.ganu@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The TCG event log buffer is being set at the end of ram memory. This region of memory is to be reserved as LMB_NOMAP memory in the LMB memory map. The current location of this buffer overlaps with the memory region reserved for the U-Boot image, which is at the top of the usable memory. This worked earlier as the LMB memory map was not global but caller specific, but fails now because of the overlap. Move the TCG event log buffer to the start of the ram memory region instead. Move the location of the early trace buffer and the load buffer for U-Boot(spl boot) accordingly. Signed-off-by: Sughosh Ganu Reviewed-by: Simon Glass --- Changes since V2: * Move the TCG event log to a location such that it does not clash with any load addresses in the tests. * Adjust the values of CONFIG_TRACE_EARLY_ADDR and U-Boot load address for SPL accordingly. arch/sandbox/dts/test.dts | 2 +- configs/sandbox_spl_defconfig | 2 +- doc/arch/sandbox/sandbox.rst | 5 +++-- lib/Kconfig | 2 +- 4 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 5fb5eac862..8412506c17 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -78,7 +78,7 @@ event_log: tcg_event_log { no-map; - reg = <(CFG_SYS_SDRAM_SIZE - 0x2000) 0x2000>; + reg = <(CFG_SYS_SDRAM_BASE + 0x100000) 0x2000>; }; }; diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index f7b92dc844..826a82d092 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -1,4 +1,4 @@ -CONFIG_TEXT_BASE=0x200000 +CONFIG_TEXT_BASE=0x400000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst index 5f8db12665..4967551724 100644 --- a/doc/arch/sandbox/sandbox.rst +++ b/doc/arch/sandbox/sandbox.rst @@ -662,7 +662,8 @@ Addr Config Usage b000 CONFIG_BLOBLIST_ADDR Blob list 10000 CFG_MALLOC_F_ADDR Early memory allocation f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer - 100000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used + 100000 TCG Event log TCG Event Log + 200000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used as the SPL load buffer in spl_test_load(). - 200000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only) + 400000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only) ======= ======================== =============================== diff --git a/lib/Kconfig b/lib/Kconfig index e352b5550a..5f282ecb54 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -403,7 +403,7 @@ config TRACE_EARLY_CALL_DEPTH_LIMIT config TRACE_EARLY_ADDR hex "Address of early trace buffer in U-Boot" depends on TRACE_EARLY - default 0x00100000 + default 0x00200000 help Sets the address of the early trace buffer in U-Boot. This memory must be accessible before relocation.