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[2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id 4fb4d7f45d1cf-5bd1a5cc44csi5027679a12.226.2024.08.14.04.04.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Aug 2024 04:04:49 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9B5DF889FF; Wed, 14 Aug 2024 13:02:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 1B701889FC; Wed, 14 Aug 2024 13:02:31 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED, SPF_HELO_NONE,SPF_SOFTFAIL,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id E2027889FF for ; Wed, 14 Aug 2024 13:02:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 40501DA7; Wed, 14 Aug 2024 04:02:54 -0700 (PDT) Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C0B973F58B; Wed, 14 Aug 2024 04:02:23 -0700 (PDT) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Ilias Apalodimas , Heinrich Schuchardt , Simon Glass , Marek Vasut , Tom Rini , Mark Kettenis , Michal Simek , Patrick DELAUNAY , Patrice CHOTARD , Huan Wang , Angelo Dureghello , Daniel Schwierzeck , Thomas Chou , Rick Chen , Max Filippov , Sughosh Ganu Subject: [PATCH v2 23/32] sandbox: iommu: remove lmb allocation in the driver Date: Wed, 14 Aug 2024 16:30:00 +0530 Message-Id: <20240814110009.45310-24-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814110009.45310-1-sughosh.ganu@linaro.org> References: <20240814110009.45310-1-sughosh.ganu@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The sandbox iommu driver uses the LMB module to allocate a particular range of memory for the device virtual address(DVA). This used to work earlier since the LMB memory map was caller specific and not global. But with the change to make the LMB allocations global and persistent, adding this memory range has other side effects. On the other hand, the sandbox iommu test expects to see this particular value of the DVA. Use the DVA address directly, instead of mapping it in the LMB memory map, and then have it allocated. Signed-off-by: Sughosh Ganu Reviewed-by: Simon Glass --- Changes since V1: * Move the DVA address and page size as macros to the test.h header file. arch/sandbox/include/asm/test.h | 4 ++++ drivers/iommu/sandbox_iommu.c | 25 ++++++------------------- 2 files changed, 10 insertions(+), 19 deletions(-) diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 17159f8d67..0e8d19ce23 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -49,6 +49,10 @@ struct unit_test_state; #define PCI_EA_BAR2_MAGIC 0x72727272 #define PCI_EA_BAR4_MAGIC 0x74747474 +/* Used by the sandbox iommu driver */ +#define SANDBOX_IOMMU_DVA_ADDR 0x89abc000 +#define SANDBOX_IOMMU_PAGE_SIZE SZ_4K + enum { SANDBOX_IRQN_PEND = 1, /* Interrupt number for 'pending' test */ }; diff --git a/drivers/iommu/sandbox_iommu.c b/drivers/iommu/sandbox_iommu.c index 5b4a6a8982..c5eefec218 100644 --- a/drivers/iommu/sandbox_iommu.c +++ b/drivers/iommu/sandbox_iommu.c @@ -5,23 +5,20 @@ #include #include -#include #include +#include #include -#define IOMMU_PAGE_SIZE SZ_4K - static dma_addr_t sandbox_iommu_map(struct udevice *dev, void *addr, size_t size) { phys_addr_t paddr, dva; phys_size_t psize, off; - paddr = ALIGN_DOWN(virt_to_phys(addr), IOMMU_PAGE_SIZE); + paddr = ALIGN_DOWN(virt_to_phys(addr), SANDBOX_IOMMU_PAGE_SIZE); off = virt_to_phys(addr) - paddr; - psize = ALIGN(size + off, IOMMU_PAGE_SIZE); - - dva = lmb_alloc(psize, IOMMU_PAGE_SIZE); + psize = ALIGN(size + off, SANDBOX_IOMMU_PAGE_SIZE); + dva = (phys_addr_t)SANDBOX_IOMMU_DVA_ADDR; return dva + off; } @@ -32,11 +29,9 @@ static void sandbox_iommu_unmap(struct udevice *dev, dma_addr_t addr, phys_addr_t dva; phys_size_t psize; - dva = ALIGN_DOWN(addr, IOMMU_PAGE_SIZE); + dva = ALIGN_DOWN(addr, SANDBOX_IOMMU_PAGE_SIZE); psize = size + (addr - dva); - psize = ALIGN(psize, IOMMU_PAGE_SIZE); - - lmb_free(dva, psize); + psize = ALIGN(psize, SANDBOX_IOMMU_PAGE_SIZE); } static struct iommu_ops sandbox_iommu_ops = { @@ -44,13 +39,6 @@ static struct iommu_ops sandbox_iommu_ops = { .unmap = sandbox_iommu_unmap, }; -static int sandbox_iommu_probe(struct udevice *dev) -{ - lmb_add(0x89abc000, SZ_16K); - - return 0; -} - static const struct udevice_id sandbox_iommu_ids[] = { { .compatible = "sandbox,iommu" }, { /* sentinel */ } @@ -61,5 +49,4 @@ U_BOOT_DRIVER(sandbox_iommu) = { .id = UCLASS_IOMMU, .of_match = sandbox_iommu_ids, .ops = &sandbox_iommu_ops, - .probe = sandbox_iommu_probe, };