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Thu, 08 Aug 2024 16:59:45 -0700 (PDT) From: Caleb Connolly Date: Fri, 09 Aug 2024 01:59:31 +0200 Subject: [PATCH 08/11] armv8: mmu: add a way to map additional regions MIME-Version: 1.0 Message-Id: <20240809-b4-snapdragon-improvements-v1-8-7c353f3e8f74@linaro.org> References: <20240809-b4-snapdragon-improvements-v1-0-7c353f3e8f74@linaro.org> In-Reply-To: <20240809-b4-snapdragon-improvements-v1-0-7c353f3e8f74@linaro.org> To: Tom Rini , Caleb Connolly , Neil Armstrong , Sumit Garg Cc: u-boot-qcom@groups.io, u-boot@lists.denx.de X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2205; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=I+9ipfeNdEptTRnpJiTjsZesLVLKr+Y6p2Fs08UVmcU=; b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmtVvobIeQbqh0IgzdDxxKb8j3yFwz0qz8tMg7y /Hpzc3wsxeJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZrVb6AAKCRAFgzErGV9k tpRnD/9UXoG/5VVqClH6ewJQRSG++InweyM2SovAbUMqhzqPyPyLi1asUQOusORbhGg7wnYYxZ8 5wBWbWL3EKDTl+DlGrGUQq0c4tE3XAHbugyiVuH9ZCtDQFyT4GxOuyecKdrEgHp5vrJHGnKOm71 pqtiK0n4UG67jjnymmCfNDjdX2bmGi1YK2aVJQ87AqTZi/q95oq+KFyStux3imaVfCAefjnwKwG E5il1eoJewzvq4UAatIy7SacErQsSeT5lYbY5RSR1E7EZKzvmALodNaRAq78NE97uOCzFaxiSBB C7XWWWQvUE8iRo5gkJD9sne9DeOGo2xgTq3RHJZ4WSGByyNbIB38uORlN5xJBOeWRo5GBKFZ1IG CXv7qQfgRWLYUmMLI2z1zuSwjxr1qnI6WmKf3gLbCT7v/OM9zVohzFIm2BsG2/tkX3iLUJ9pfH1 2AmliBy8BJw6eo2PcrYbl8MoBnjPmMxOIksX96h5+hCcMt2LuZ1sZHn3yAIoaEWbq9L8S108LVw Xu7Ss268wuW2pEghDtw1rMq+LnrJBBWZtwZo3dXnFIRt6z6q9x1YDyPFs2IQ8Qtt550lDWLwDxi CuBJ795g5mLaLcfAHrYeJfABvfDIT9ISCF2IamVRBN2Kz3qJOKgy1bLMD5kxLYrrIQ1bqHKlc9s d+oM/55l8KObLMA== X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean In some cases we might want to map some memory region after enabling caches. Introduce a new helper for this. Signed-off-by: Caleb Connolly --- arch/arm/cpu/armv8/cache_v8.c | 25 +++++++++++++++++++++++++ arch/arm/include/asm/system.h | 10 ++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index c3f8dac648ba..631d9efa5e10 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -338,8 +338,33 @@ static void map_range(u64 virt, u64 phys, u64 size, int level, size -= next_size; } } +void mmu_map_region(phys_addr_t addr, u64 size, bool emergency) +{ + u64 va_bits; + int level = 0; + u64 attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; + + attrs |= PTE_TYPE_BLOCK | PTE_BLOCK_AF; + + get_tcr(NULL, &va_bits); + if (va_bits < 39) + level = 1; + + if (emergency) + map_range(addr, addr, size, level, + (u64 *)gd->arch.tlb_emerg, attrs); + + /* Switch pagetables while we update the primary one */ + __asm_switch_ttbr(gd->arch.tlb_emerg); + + map_range(addr, addr, size, level, + (u64 *)gd->arch.tlb_addr, attrs); + + __asm_switch_ttbr(gd->arch.tlb_addr); +} + static void add_map(struct mm_region *map) { u64 attrs = map->attrs | PTE_TYPE_BLOCK | PTE_BLOCK_AF; u64 va_bits; diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 7e30cac32a09..2237d7d00668 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -276,8 +276,18 @@ void wait_for_wakeup(void); void protect_secure_region(void); void smp_kick_all_cpus(void); void flush_l3_cache(void); + +/** + * mmu_map_region() - map a region of previously unmapped memory. + * Will be mapped MT_NORMAL & PTE_BLOCK_INNER_SHARE. + * + * @start: Start address of the region + * @size: Size of the region + * @emerg: Also map the region in the emergency table + */ +void mmu_map_region(phys_addr_t start, u64 size, bool emerg); void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs); /* * smc_call() - issue a secure monitor call