From patchwork Thu Aug 8 03:14:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 817688 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e11:0:b0:367:895a:4699 with SMTP id p17csp675574wrt; Wed, 7 Aug 2024 20:19:16 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWOsK2siHPNGEnCkfVb/7VGsMdzdKwbn0Svxj09d77gzR+0vvsOuoFD5NTLcRWZC9aFGJ1r29AB64/i3y5bTK3R X-Google-Smtp-Source: AGHT+IEUE/RrBQ+7VArS0xu6hwD3gzjPqKe9EQkepAf6J3Fh1S2SxAAIdq91HI/mWd8K9YNQp8do X-Received: by 2002:a05:6402:1d54:b0:58c:b2b8:31b2 with SMTP id 4fb4d7f45d1cf-5bbb3d1d1f0mr275699a12.17.1723087156729; Wed, 07 Aug 2024 20:19:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723087156; cv=none; d=google.com; s=arc-20160816; b=e20TgF4hIaa8QyLy60O92XAyeM+brmp/AntkUu000vwTmkp+bbX4AoG7kzKyNFpDzS NXnba/Hy7MAdC46rNwLCDWbM9GEKG1PYRBHi46ogKLLu6icVDfHKpAv+fzpaF4Jss+JZ hXurBjsv2VzpkTlaClOjTxCfCygXnQoXuLEjiq+xrjFpQElziOiVx4aHsg5cs96Y+938 jtbxbQbYXIUmknRMCcLKEvMtlZtRNTevLnBDhvbeAOU1NisEAW/T5sMDW3o76sWquBfq 1Pl+reluF5IGYTFLGpv2D5T7eEpqMOaRJUditg1OE9LF8E4F/GMOnWfIxPcuyNEAkDYO nHNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=f6YDJBIvcCFAl4slfQa3e+M/r3XTbUp34q0bDWEj3So=; fh=gQca5A9u1NSj5vMX0KgN6NH1bV+10jWwhd8ZzXS8wBQ=; b=FtE11PivwcuBLHC6SE/0mWRnHE1kI5+bncLIsWWLeAFdABC8SwFCZYhVON5YH3Rocg gyWCmZisqdx/TVz7sJOJGww9d37Tl75WD3NQxV8Aqt7wT5lMSwquKSxdE1r10XyQHK/L InfqEajffM1KGbLTCkGMW/LFGJwgoTqKpPupBWypJTc2ayUiQS3Lb7llMWQ9f3mXDw0N 4jNx2+1r0Ex5VWX54lsys+vIYqvd/ipKXmP0aPZ04rwnjM+PD/cDCaWjg29VymimUaKr qLSoVdYbGtgJ5oEtLhPunP7PS07WnBNqD2LefsIul1QhCT8pcFs6jicEkZYshFBAo9Bc 2LHA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sRVoHnvF; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id 4fb4d7f45d1cf-5bbb2c1f5dfsi256205a12.156.2024.08.07.20.19.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Aug 2024 20:19:16 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sRVoHnvF; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 613E188BC8; Thu, 8 Aug 2024 05:15:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="sRVoHnvF"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0057B88A87; Thu, 8 Aug 2024 05:15:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ot1-x32f.google.com (mail-ot1-x32f.google.com [IPv6:2607:f8b0:4864:20::32f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7C78C88AFF for ; Thu, 8 Aug 2024 05:15:04 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=semen.protsenko@linaro.org Received: by mail-ot1-x32f.google.com with SMTP id 46e09a7af769-70945a007f0so245640a34.2 for ; Wed, 07 Aug 2024 20:15:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1723086903; x=1723691703; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=f6YDJBIvcCFAl4slfQa3e+M/r3XTbUp34q0bDWEj3So=; b=sRVoHnvFsnnn5LH7TdkHe9FBa93KLgHrTQ+9VMrOaawEY2vZA5iCEkMf8C0KiQrrQ/ iLQbj/7EWpkOx8DHRWjHyYxS2AF36QdfvP4jPqql7pzw/dCMBE2FRv/XzUUCtbZpdMgW 17GNA4fju7BxsXepp2jUpw3BWG4hCQbjccDhjXNmfNxMKyszO0w6FN1jhF5UXREmw5x9 Tl4mQ6uV26kkdAscZfCna6X9z4ChuLmNCTqJsHKhrilKuSFkKfkoEWfSabYVHeBbPUra xgn5O5kpqFYEE69dqrg7Qj+J8gdrMc/OOYPKxYfa662XBPtz9BaAfXW5i6899QOrtZwk IEGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723086903; x=1723691703; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=f6YDJBIvcCFAl4slfQa3e+M/r3XTbUp34q0bDWEj3So=; b=a/mQRn6qOqsC+fcFmsJZI6N7v4gxgh9s89q8njsR2nSMsCu0tTr8ZkMj8Z353LNN7R +4jbylHysH4ryq4Ur9L1ZSOmyHdlZVOzsK1ecZNwsuMNe6AhuCWfq5nNKffU6yoV2hL0 Ndf5L15XeWZ4FoItOi/0Am/UVtklGBNVINdol+qlLAIrDcnFPCw+yZXeNsDVoBcacmZ9 5UObZdJ74RIUBGMT7xih9O64giV4jVKnFRgJnkXFb5iVdJUydxGC1jvcociv3c6NzPPq uwvcaQxc/RdjI3amWgtkRQe8Jt/vX7WD5JjkjCS8C19zz/MflDtMmUM57Gb8o3Mmbes7 ZFJw== X-Forwarded-Encrypted: i=1; AJvYcCX1EG7ok8oshlf1/vkqlbQ8FKbLGP8ZHYwoZrLEltXEITsxw4zaf8Gclxh8xd8n+olaQ1BJkWEGd2cHsjNEq5CC3li70A== X-Gm-Message-State: AOJu0YxQ/t2arMILbZ+0A2+Rxz5pDDiPixvNNeQGN9vMw9gd4GhnFTeT RpuAnpZNrVWvv90+vOZTFuzqBdzXd+5PzG/caTxR0cB/XspnzA++YPK71+ERLR8= X-Received: by 2002:a05:6830:6608:b0:703:b0e9:d951 with SMTP id 46e09a7af769-70b4fc2e66cmr675014a34.6.1723086902844; Wed, 07 Aug 2024 20:15:02 -0700 (PDT) Received: from localhost ([136.62.192.75]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-70a3a7693dbsm5175702a34.72.2024.08.07.20.15.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Aug 2024 20:15:02 -0700 (PDT) From: Sam Protsenko To: Minkyu Kang , Minkyu Kang , Jaehoon Chung Cc: Tom Rini , Henrik Grimler , Peng Fan , Simon Glass , Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v5 24/38] mmc: exynos_dw_mmc: Abstract CLKSEL register Date: Wed, 7 Aug 2024 22:14:30 -0500 Message-Id: <20240808031444.9619-25-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240808031444.9619-1-semen.protsenko@linaro.org> References: <20240808031444.9619-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean CLKSEL register offset may vary between different Exynos chips, e.g. on ARM64 vs ARM32 chips. Provide a way to specify its offset value for each compatible instead of hard-coding its value in read/write calls. No functional change. Signed-off-by: Sam Protsenko --- Changes in v5: - (none) Changes in v4: - (none) Changes in v3: - (none) Changes in v2: - (none) drivers/mmc/exynos_dw_mmc.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 4108af47e518..fd2ced3d711d 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -33,6 +33,11 @@ struct exynos_mmc_plat { }; #endif +/* Chip specific data */ +struct exynos_dwmmc_variant { + u32 clksel; /* CLKSEL register offset */ +}; + /* Exynos implmentation specific drver private data */ struct dwmci_exynos_priv_data { #ifdef CONFIG_DM_MMC @@ -40,6 +45,7 @@ struct dwmci_exynos_priv_data { #endif struct clk clk; u32 sdr_timing; + const struct exynos_dwmmc_variant *chip; }; static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( @@ -115,13 +121,14 @@ static int exynos_dwmci_clksel(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); - dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); + dwmci_writel(host, priv->chip->clksel, priv->sdr_timing); return 0; } unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); unsigned long sclk; int8_t clk_div; int err; @@ -132,7 +139,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) * clock value to calculate the CLKDIV value. * as per user manual:cclk_in = SDCLKIN / (DIVRATIO + 1) */ - clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) + clk_div = ((dwmci_readl(host, priv->chip->clksel) >> DWMCI_DIVRATIO_BIT) & DWMCI_DIVRATIO_MASK) + 1; err = exynos_dwmmc_get_sclk(host, &sclk); @@ -229,6 +236,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) int err = 0; u32 div, timing[2]; + priv->chip = (struct exynos_dwmmc_variant *)dev_get_driver_data(dev); + #ifdef CONFIG_CPU_V7A const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); @@ -322,9 +331,22 @@ static int exynos_dwmmc_bind(struct udevice *dev) return dwmci_bind(dev, &plat->mmc, &plat->cfg); } +static const struct exynos_dwmmc_variant exynos4_drv_data = { + .clksel = DWMCI_CLKSEL, +}; + +static const struct exynos_dwmmc_variant exynos5_drv_data = { + .clksel = DWMCI_CLKSEL, +}; + static const struct udevice_id exynos_dwmmc_ids[] = { - { .compatible = "samsung,exynos4412-dw-mshc" }, - { .compatible = "samsung,exynos-dwmmc" }, + { + .compatible = "samsung,exynos4412-dw-mshc", + .data = (ulong)&exynos4_drv_data, + }, { + .compatible = "samsung,exynos-dwmmc", + .data = (ulong)&exynos5_drv_data, + }, { } };