From patchwork Mon Jun 10 01:12:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802945 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734647wro; Sun, 9 Jun 2024 18:15:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVWiiIVmKU0eanvntBgHQF5qMRGu4GvEXHDhwH8FbA7h0GKsACTBBDm7KKI+nigod2R+5ZbFYdFMm6OLzlomN4V X-Google-Smtp-Source: AGHT+IHpLLc5cNahk7+4CCk4FzuVVBpTHOLL2DXydO/xfKEjjJZNtAO7lRQpWxTu0sUqKBRaPAlS X-Received: by 2002:a17:906:c209:b0:a6f:28a3:3bf with SMTP id a640c23a62f3a-a6f28a3092emr5008866b.3.1717982104478; Sun, 09 Jun 2024 18:15:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982104; cv=none; d=google.com; s=arc-20160816; b=BUNqLKcH3qguIAEyXHCe7ISR9p6S5bB2CpSjpMvL14b6OGkASvDcm4T39txtgXjuU1 LW/3Tojz/Ud2Xhw3A0Xrm2J2fTR5bvB3GWH3N/diGlGi+QxHoNBS5jXjmlQ6L82RavOU rIb2gSMPMLcIrnEcYfTbBJ8HOYRcl3RdC6lL8uBhI02c5DKuoxkaL/O/MG+7msmkfeD8 duIUzkoP/B1N0o0bLhC2xmytgBLUB7+CWEC9KOqKYG3WeCcvo5RFqpzYhXslGI0AuiCs WJ9TnglkPANbGH5eNfaOJw4RtulMiG/PCkPFAkTrwBmxA/4dbhKssDipzsfQr796eMLm v6sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0PyC3TThwDEvlFX+fzX3KvxCX5ai2mCtFlnk+pqE4F8=; fh=MR4i5e33W+JMgMQeojn8k84+QPtBf8nUi3vZKWjsBQA=; b=nASu450ZZLSG9bjSV+mnLwtHRUHFr653UocvkxAMxB9UmZvLFGgPuolH7FHpszIf6U IGSn/T2H+C/c33a48CsZeyClOwxnPP5sKWj5KD/F8WfMj8jTdFsOcCQlhaz6eqOZByx3 ybhbrJvxo5Q+SykZhLkFFyjDvA78yQE05qslCG6CaCFX+ZswrDlJzAeThV6alKaMkzmI NgShZXgt8aLJijNiJOf3otXP0Bw+GAulbtVCrWlqo469tcXqDzkvwQt7CXY8KCPejXWP YPZaFTj/CjYNkd3F07LESfllebF27tcKPKuTLq+om54bJHJFNorbgjpIqrFmKdI4sLsZ b1yw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h4VMqbOI; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id a640c23a62f3a-a6c817c62e3si427750766b.713.2024.06.09.18.15.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Jun 2024 18:15:04 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h4VMqbOI; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1DF3388481; Mon, 10 Jun 2024 03:12:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="h4VMqbOI"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 78DEE884B8; Mon, 10 Jun 2024 03:12:42 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-oa1-x2b.google.com (mail-oa1-x2b.google.com [IPv6:2001:4860:4864:20::2b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8E422884C9 for ; Mon, 10 Jun 2024 03:12:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=semen.protsenko@linaro.org Received: by mail-oa1-x2b.google.com with SMTP id 586e51a60fabf-254764f5472so1224355fac.1 for ; Sun, 09 Jun 2024 18:12:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717981958; x=1718586758; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0PyC3TThwDEvlFX+fzX3KvxCX5ai2mCtFlnk+pqE4F8=; b=h4VMqbOITZQeIE3CZ9f9z22NTIR67e+gFjp/UynKtOXxrPk22LflfdrFeOgjiRA07g dARKEiDGiCXa+dyfBHVrxtPo8BJNq37cXw/zIGEVE61iX0CHRB+ItCjUjoiO9gH5spfX YMG7km3lZaD5KQPtLYKNCGDqFtVU8Mm3GjAPKcJo8dQ7306zG1pPbKmHl472S/PzDCqv QZTsU7I1/i9kE1x/Yxlt33baWkU85NrCRixDgQ54HjnCWJMN5OfRF5cq4iLszoVNiiiF 2Zzi6aweCQ7LTlF8Xs8fsBhTkcdz43bi57tqNZQIQc6Lc6tAu6XwXsbOQk9i1neUdi7m ucyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717981958; x=1718586758; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0PyC3TThwDEvlFX+fzX3KvxCX5ai2mCtFlnk+pqE4F8=; b=DjwthnyIWNhP3pctbpu1ugGFmOZh/4GTOoNqFIDNq+v03BV61BF6b/Q4uVub/LPRy8 VGJrz61zCoLuXFDt3LDSI7W4E8theVQ8kgHjanrDrUJ8NeyDinzpCBIWz5D8X0D+Macj St3ssTExIJ8jhjejPoxFZaaDwS8JK2nIIiBKrZhKQgRXRqwjUxcOEcKkN+QugMgc/0mz 3mgKL/1knL9aWxuXGqfFz7nd0xNKGy4jMBB8pieojKeVuwiccJQbCc4GNo2EzM+uXQO7 iKGYvfsAzRdnTzDeueUDyyhGLHBiSHAN3OKLYz79EMoIQYKk8F45cDPxjHyhG1tEoND5 3GKw== X-Forwarded-Encrypted: i=1; AJvYcCXCx0ioK4YbggQkK31wIIyAxNCeSY90rG5Ow1k3uifiJvtQHoPGYTjDH/1f4CaMtd8Hwxw3d1ZH/tgVsJOpJ94oiAjuxw== X-Gm-Message-State: AOJu0YwsLmV4QJZ57n3pi1XIEuT2Bt1+Nm8U9XU6T8Kdt0S2nmipi8Z3 JB/T0eEp6RuOgPF+Dt/qvMejihJ+cRLAP351Ld6tYe4J3ClcauAQ1A4lDg6OiZg= X-Received: by 2002:a05:6870:c6a8:b0:254:a613:1907 with SMTP id 586e51a60fabf-254a613270fmr4493897fac.56.1717981958275; Sun, 09 Jun 2024 18:12:38 -0700 (PDT) Received: from localhost ([136.62.192.75]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-254480c17b3sm2038282fac.51.2024.06.09.18.12.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Jun 2024 18:12:38 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 16/40] dt-bindings: exynos: Update bindings doc for DW MMC controller Date: Sun, 9 Jun 2024 20:12:02 -0500 Message-Id: <20240610011226.4050-17-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Update the bindings doc for Exynos DW MMC block to follow the upstream example and reflect the latest changes made in corresponding Linux kernel bindings. Signed-off-by: Sam Protsenko --- doc/device-tree-bindings/exynos/dwmmc.txt | 46 +++++++++++++---------- 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt index 694d1959162c..d90792be8599 100644 --- a/doc/device-tree-bindings/exynos/dwmmc.txt +++ b/doc/device-tree-bindings/exynos/dwmmc.txt @@ -12,7 +12,9 @@ SOC specific and Board specific properties are channel specific. Required SoC Specific Properties: - compatible: should be - - samsung,exynos-dwmmc: for exynos platforms + - samsung,exynos4412-dw-mshc: for Exynos4 platforms + - samsung,exynos-dwmmc: for Exynos5 platforms + - samsung,exynos7-dw-mshc-smu: for Exynos7 platforms (with SMU block) - reg: physical base address of the controller and length of memory mapped region. @@ -23,32 +25,38 @@ Required Board Specific Properties: - #address-cells: should be 1. - #size-cells: should be 0. -- samsung,bus-width: The width of the bus used to interface the devices +- bus-width: The width of the bus used to interface the devices supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO). . Typically the bus width is 4 or 8. -- samsung,timing: The timing values to be written into the - Drv/sample clock selection register of corresponding channel. - . It is comprised of 3 values corresponding to the 3 fileds - 'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register. - . SelClk_sample: Select sample clock among 8 shifted clocks. - . SelClk_drv: Select drv clock among 8 shifted clocks. - . DIVRATIO: Clock Divide ratio select. - . The above 3 values are used by the clock phase shifter. +- samsung,dw-mshc-ciu-div: The divider value for the card interface unit (ciu) + clock (0..7). +- samsung,dw-mshc-sdr-timing: The timing values for single data rate (SDR) mode + operation. + . First value is CIU clock phase shift value for TX mode (0..7). + . Second value is CIU clock phase shift value for RX mode (0..7). +- samsung,dw-mshc-ddr-timing: The timing values for double data rate (DDR) mode + operation. If missing, values from samsung,dw-mshc-sdr-timing are used. + . First value is CIU clock phase shift value for TX mode (0..7). + . Second value is CIU clock phase shift value for RX mode (0..7). Example: mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <1>; -} + bus-width = <8>; + non-removable; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; + samsung,dw-mshc-ddr-timing = <0 2>; +}; + In the above example, . The bus width is 8 - . Timing is comprised of 3 values as explained below + . Divider value for CLKSEL register is 3. The CIU clock rate will be + calculated as SDCLKIN / (3 + 1). + . SDR and DDR timings are comprised of 2 values as explained below 1 - SelClk_sample 3 - SelClk_drv - 3 - DIVRATIO - . The 'removable' flag indicates whether the the particilar device + . The 'non-removable' flag indicates whether the particular device cannot be removed (always present) or it is a removable device. - 1 - Indicates that the device is removable. - 0 - Indicates that the device cannot be removed. + Flag is present - Indicates that the device cannot be removed. + Flag is not present - Indicates that the device is removable.