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[1/3] clk/qcom: apq8016: return valid rate when setting UART clock

Message ID 20240415-b4-msm-serial-bitrate-v1-1-5a89f84fd9e7@linaro.org
State Superseded
Headers show
Series qcom: serial_msm: calculate UARTDM_CSR automatically | expand

Commit Message

Caleb Connolly April 15, 2024, 12:44 p.m. UTC 
The clk_init_uart() helper always returns 0, but we're meant to return a
real clock rate. Given that we hardcode 115200 baud, just return the
clock rate that we set.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
---
 drivers/clk/qcom/clock-apq8016.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
index 5a5868169c89..6210fba87984 100644
--- a/drivers/clk/qcom/clock-apq8016.c
+++ b/drivers/clk/qcom/clock-apq8016.c
@@ -99,10 +99,10 @@  static ulong apq8016_clk_set_rate(struct clk *clk, ulong rate)
 	case GCC_SDCC2_APPS_CLK: /* SDC2 */
 		return clk_init_sdc(priv, 1, rate);
 		break;
 	case GCC_BLSP1_UART2_APPS_CLK: /* UART2 */
-		return apq8016_clk_init_uart(priv->base);
-		break;
+		apq8016_clk_init_uart(priv->base);
+		return 7372800;
 	default:
 		return 0;
 	}
 }