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a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean We currently default to the lowest rate but this actually doesn't work on most platforms. Default to the HS400 speed instead which is most common on Qualcomm platforms. Signed-off-by: Caleb Connolly --- drivers/mmc/msm_sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index ea5d6b4cbbee..2144772ac325 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -61,9 +61,9 @@ static int msm_sdc_clk_init(struct udevice *dev) const char *clk_name; ret = ofnode_read_u32(node, "clock-frequency", (uint *)(&clk_rate)); if (ret) - clk_rate = 400000; + clk_rate = 201500000; ret = clk_get_bulk(dev, &prv->clks); if (ret) { log_warning("Couldn't get mmc clocks: %d\n", ret);