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a=openpgp-sha256; l=3612; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=kPJE3UPg8M7mU9/CNo/+NPvMOmVzSu6bDOYbQocrEJY=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBmD7MQqkhq2QDTieroMKIJVLhnnPVjDDKAPEaFew6D sL5XGWKJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZg+zEAAKCRB33NvayMhJ0berD/ 9BmKB/gtn2B2+UJKCEUXazeH3zS3kd82l9Nw50psz+fdyM15Jm+hD2LqQE0vuAtxQWpccp7si+kHbx dF4pT6nfRHgmDwHc/IoZ+rBFbHSSMd/v6WrbaTKkvwAKdspjhk+X4MZ8/NY7CBxSBiHszludEmSF2B +JEUNXWu0aSH8pA1b2EtGKKKMAovYeUZ/VY7v31QS2it8sNAWVaBVGA87GdMATq67SJjHTE/JOEtul tiae/7/Cbu1B4C8jpnsqA/D1fwk1Eawsva89jBjAo4gkketpA7OzWhHL0ImsIUL/cZin9Rg2vOn1++ oNQUDuq1+ZonxpxZL9pFFP2VIfUNP8hpDnj6BC38lEovh0zXz87aTEd5t1UI0svGVN9kRinVpOBjm/ Z8fAkzdi0OVwmvJS18js3xJZmE7nTAPTTvojUSYFbJF8dxizqIwm+YVxzrO9m8wf06iHSi0vdXrAUq FhVRZm4vxptzNgNv1jzFex3U1MXPj5ckKmjH5jfGa8I1lriIx3RtyYrfb07XuRCL5S9HTEewo/FIDs OZWsqPb5Od/57TT6uhGtsNId0tDl1mHvJ8WuWXyNBcVtr6kpHigS710eeJy8UUvKW64zUOA0LgeV+O D7uPNpCAy8OMO1j3NieLwtUY3j1GKOrcjj4hKXYGDT+b33qBbP3SFP4CRqog== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add pinctrl driver for the TLMM block found in the SM8550 SoC. This driver only handles the gpio and qup1_se7 pinmux, and makes sure the pinconf applies on SDC2 pins. Signed-off-by: Neil Armstrong Acked-by: Sumit Garg --- drivers/pinctrl/qcom/Kconfig | 7 ++++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-sm8550.c | 75 +++++++++++++++++++++++++++++++++++ 3 files changed, 83 insertions(+) diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 2fe63981478..f760bbcdd52 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -41,6 +41,13 @@ config PINCTRL_QCOM_SDM845 Say Y here to enable support for pinctrl on the Snapdragon 845 SoC, as well as the associated GPIO driver. +config PINCTRL_QCOM_SM8550 + bool "Qualcomm SM8550 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon SM8550 SoC, + as well as the associated GPIO driver. + endmenu endif diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 6d9aca6d7b7..970902e28c8 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o +obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550.c b/drivers/pinctrl/qcom/pinctrl-sm8550.c new file mode 100644 index 00000000000..d9a8a652111 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-sm8550.c @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm sm8550 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include +#include + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"qup1_se7", 1}, + {"gpio", 0}, +}; + +static const char *sm8550_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *sm8550_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + static const char *special_pins_names[] = { + "ufs_reset", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + }; + + if (selector >= 210 && selector <= 213) + snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 210]); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int sm8550_get_function_mux(__maybe_unused unsigned int pin, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +static struct msm_pinctrl_data sm8550_data = { + .pin_data = { + .pin_count = 214, + .special_pins_start = 210, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = sm8550_get_function_name, + .get_function_mux = sm8550_get_function_mux, + .get_pin_name = sm8550_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,sm8550-tlmm", .data = (ulong)&sm8550_data }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(pinctrl_sm8550) = { + .name = "pinctrl_sm8550", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; +