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[92.17.96.232]) by smtp.gmail.com with ESMTPSA id du18-20020a0560000d5200b0033b7ce8b496sm12170498wrb.108.2024.03.19.05.22.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Mar 2024 05:22:39 -0700 (PDT) From: Caleb Connolly Date: Tue, 19 Mar 2024 12:22:03 +0000 Subject: [PATCH v3 04/14] mach-snapdragon: disable power-domains for pre-reloc drivers MIME-Version: 1.0 Message-Id: <20240319-b4-qcom-livetree-v3-4-e1b38d9b4fa4@linaro.org> References: <20240319-b4-qcom-livetree-v3-0-e1b38d9b4fa4@linaro.org> In-Reply-To: <20240319-b4-qcom-livetree-v3-0-e1b38d9b4fa4@linaro.org> To: Tom Rini , Caleb Connolly , Neil Armstrong , Sumit Garg , Lukasz Majewski , Sean Anderson Cc: u-boot@lists.denx.de X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2163; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=t1kvVGeh4i1zKEXYViR55Wh180+iwZWUeqzwnZOWrZs=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtSfzZ1vWo9V/rZMu7Tp8rmbdaVK22R6rmZ/Wl4+xfj59 CV+phdZO0pZGAQ5GGTFFFnETyyzbFp72V5j+4ILMHNYmUCGMHBxCsBE/BMZGRZxiknpmYtEPrhe eStJe039nIVzak8nbk1pL97DPH3mBHeG/7F5tQLfX4SXr3u5VXB97Bz+8Js30tIOGgvucYndrJZ ntB4A X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Some devices like the UART and clock controller reference an RPM(h) power domain. We don't support this device in U-Boot, so add DM_FLAG_DEFAULT_PD_CTRL_OFF to tell DM core not to try and enable the power domain. Signed-off-by: Caleb Connolly Reviewed-by: Sumit Garg --- drivers/clk/qcom/clock-qcom.c | 2 ++ drivers/clk/qcom/clock-sdm845.c | 2 +- drivers/serial/serial_msm_geni.c | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c index 7a5938a06a34..6303dcbf8461 100644 --- a/drivers/clk/qcom/clock-qcom.c +++ b/drivers/clk/qcom/clock-qcom.c @@ -226,8 +226,9 @@ U_BOOT_DRIVER(qcom_clk) = { .id = UCLASS_CLK, .ops = &msm_clk_ops, .priv_auto = sizeof(struct msm_clk_priv), .probe = msm_clk_probe, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, }; int qcom_cc_bind(struct udevice *parent) { @@ -410,5 +411,6 @@ U_BOOT_DRIVER(qcom_power) = { .name = "qcom_power", .id = UCLASS_POWER_DOMAIN, .ops = &qcom_power_ops, .probe = qcom_power_probe, + .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c index 36ffee79d966..babd83119e2c 100644 --- a/drivers/clk/qcom/clock-sdm845.c +++ b/drivers/clk/qcom/clock-sdm845.c @@ -182,6 +182,6 @@ U_BOOT_DRIVER(gcc_sdm845) = { .name = "gcc_sdm845", .id = UCLASS_NOP, .of_match = gcc_sdm845_of_match, .bind = qcom_cc_bind, - .flags = DM_FLAG_PRE_RELOC, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, }; diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c index e5c3dcffc1c6..4aa0bc8c72bc 100644 --- a/drivers/serial/serial_msm_geni.c +++ b/drivers/serial/serial_msm_geni.c @@ -602,9 +602,9 @@ U_BOOT_DRIVER(serial_msm_geni) = { .of_to_plat = msm_serial_ofdata_to_platdata, .priv_auto = sizeof(struct msm_serial_data), .probe = msm_serial_probe, .ops = &msm_serial_ops, - .flags = DM_FLAG_PRE_RELOC, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, }; #ifdef CONFIG_DEBUG_UART_MSM_GENI