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([223.178.209.148]) by smtp.gmail.com with ESMTPSA id y12-20020aa79e0c000000b006e3e72a4f87sm5195902pfq.0.2024.02.20.05.11.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Feb 2024 05:11:28 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: marcel.ziswiler@toradex.com, trini@konsulko.com, lukma@denx.de, seanga2@gmail.com, jh80.chung@samsung.com, festevam@denx.de, andrejs.cainikovs@toradex.com, sjg@chromium.org, peng.fan@nxp.com, aford173@gmail.com, marex@denx.de, ilias.apalodimas@linaro.org, sahaj.sarup@linaro.org, fathi.boudra@linaro.org, remi.duraffort@linaro.org, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 3/7] imx8mp: power-domain: Add PCIe support Date: Tue, 20 Feb 2024 18:40:52 +0530 Message-Id: <20240220131056.2962331-4-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240220131056.2962331-1-sumit.garg@linaro.org> References: <20240220131056.2962331-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Pre-requisite to enable PCIe support on iMX8MP SoC. Signed-off-by: Sumit Garg --- drivers/power/domain/imx8mp-hsiomix.c | 50 +++++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/power/domain/imx8mp-hsiomix.c b/drivers/power/domain/imx8mp-hsiomix.c index e2d772c5ec7..62145e0261b 100644 --- a/drivers/power/domain/imx8mp-hsiomix.c +++ b/drivers/power/domain/imx8mp-hsiomix.c @@ -16,14 +16,19 @@ #define GPR_REG0 0x0 #define PCIE_CLOCK_MODULE_EN BIT(0) #define USB_CLOCK_MODULE_EN BIT(1) +#define PCIE_PHY_APB_RST BIT(4) +#define PCIE_PHY_INIT_RST BIT(5) struct imx8mp_hsiomix_priv { void __iomem *base; struct clk clk_usb; + struct clk clk_pcie; struct power_domain pd_bus; struct power_domain pd_usb; + struct power_domain pd_pcie; struct power_domain pd_usb_phy1; struct power_domain pd_usb_phy2; + struct power_domain pd_pcie_phy; }; static int imx8mp_hsiomix_on(struct power_domain *power_domain) @@ -43,6 +48,10 @@ static int imx8mp_hsiomix_on(struct power_domain *power_domain) domain = &priv->pd_usb_phy1; } else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) { domain = &priv->pd_usb_phy2; + } else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE) { + domain = &priv->pd_pcie; + } else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE_PHY) { + domain = &priv->pd_pcie_phy; } else { ret = -EINVAL; goto err_pd; @@ -54,14 +63,25 @@ static int imx8mp_hsiomix_on(struct power_domain *power_domain) ret = clk_enable(&priv->clk_usb); if (ret) - goto err_clk; + goto err_clk_usb; + + ret = clk_enable(&priv->clk_pcie); + if (ret) + goto err_clk_pcie; if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) setbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE) + setbits_le32(priv->base + GPR_REG0, PCIE_CLOCK_MODULE_EN); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE_PHY) + setbits_le32(priv->base + GPR_REG0, PCIE_PHY_APB_RST | + PCIE_PHY_INIT_RST); return 0; -err_clk: +err_clk_pcie: + clk_disable(&priv->clk_usb); +err_clk_usb: power_domain_off(domain); err_pd: power_domain_off(&priv->pd_bus); @@ -75,8 +95,14 @@ static int imx8mp_hsiomix_off(struct power_domain *power_domain) if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) clrbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE) + clrbits_le32(priv->base + GPR_REG0, PCIE_CLOCK_MODULE_EN); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE_PHY) + clrbits_le32(priv->base + GPR_REG0, PCIE_PHY_APB_RST | + PCIE_PHY_INIT_RST); clk_disable(&priv->clk_usb); + clk_disable(&priv->clk_pcie); if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) power_domain_off(&priv->pd_usb); @@ -84,6 +110,10 @@ static int imx8mp_hsiomix_off(struct power_domain *power_domain) power_domain_off(&priv->pd_usb_phy1); else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) power_domain_off(&priv->pd_usb_phy2); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE) + power_domain_off(&priv->pd_usb_phy2); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE_PHY) + power_domain_off(&priv->pd_usb_phy2); power_domain_off(&priv->pd_bus); @@ -109,6 +139,10 @@ static int imx8mp_hsiomix_probe(struct udevice *dev) if (ret < 0) return ret; + ret = clk_get_by_name(dev, "pcie", &priv->clk_pcie); + if (ret < 0) + return ret; + ret = power_domain_get_by_name(dev, &priv->pd_bus, "bus"); if (ret < 0) return ret; @@ -125,8 +159,20 @@ static int imx8mp_hsiomix_probe(struct udevice *dev) if (ret < 0) goto err_pd_usb_phy2; + ret = power_domain_get_by_name(dev, &priv->pd_pcie, "pcie"); + if (ret < 0) + goto err_pd_pcie; + + ret = power_domain_get_by_name(dev, &priv->pd_pcie_phy, "pcie-phy"); + if (ret < 0) + goto err_pd_pcie_phy; + return 0; +err_pd_pcie_phy: + power_domain_free(&priv->pd_pcie); +err_pd_pcie: + power_domain_free(&priv->pd_usb_phy2); err_pd_usb_phy2: power_domain_free(&priv->pd_usb_phy1); err_pd_usb_phy1: