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[92.17.96.232]) by smtp.gmail.com with ESMTPSA id g11-20020a05600c310b00b0040f035bebfcsm1799017wmo.12.2024.01.30.06.05.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 06:05:46 -0800 (PST) From: Caleb Connolly Date: Tue, 30 Jan 2024 14:05:23 +0000 Subject: [PATCH v3 35/36] pinctrl: qcom: fix DT compatibility MIME-Version: 1.0 Message-Id: <20240130-b4-qcom-common-target-v3-35-e523cbf9e556@linaro.org> References: <20240130-b4-qcom-common-target-v3-0-e523cbf9e556@linaro.org> In-Reply-To: <20240130-b4-qcom-common-target-v3-0-e523cbf9e556@linaro.org> To: Neil Armstrong , Sumit Garg , Ramon Fried , Dzmitry Sankouski , Caleb Connolly , Peng Fan , Jaehoon Chung , Rayagonda Kokatanur , Lukasz Majewski , Sean Anderson , Jorge Ramirez-Ortiz , Stephan Gerhold Cc: Marek Vasut , u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=3685; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=tetrCOcVmh3zSJ7gD5X5FyE0LFpHNwXpgZhqPq7Pg40=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtSdTMLK4d+zA+I4dA0Wqd1r/u3JuD/2yifdGh33C6ttP s0NSH7ZUcrCIMjBICumyCJ+Ypll09rL9hrbF1yAmcPKBDKEgYtTACYyrZPhN5vQWa5nYYs+FzFO zFj49HWZ5Y6i2e7fmh42Hnyw+McPjakMfzg05f8VvjMRXv5SVM015N/56SICIee3x82YyvD/qsD 1g8EA X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Upstream devicetrees label GPIOs with "gpioX", not "GPIO_X", fix this for SoCs where we're now using upstream DT. Signed-off-by: Caleb Connolly --- drivers/pinctrl/qcom/pinctrl-apq8016.c | 26 +++++++++++++------------- drivers/pinctrl/qcom/pinctrl-apq8096.c | 16 ++++++++-------- drivers/pinctrl/qcom/pinctrl-qcs404.c | 16 ++++++++-------- 3 files changed, 29 insertions(+), 29 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c index 8e698085d78b..bcff6abca4a0 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8016.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c @@ -14,18 +14,18 @@ #define MAX_PIN_NAME_LEN 32 static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { - "SDC1_CLK", - "SDC1_CMD", - "SDC1_DATA", - "SDC2_CLK", - "SDC2_CMD", - "SDC2_DATA", - "QDSD_CLK", - "QDSD_CMD", - "QDSD_DATA0", - "QDSD_DATA1", - "QDSD_DATA2", - "QDSD_DATA3", + "sdc1_clk", + "sdc1_cmd", + "sdc1_data", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + "qdsd_clk", + "qdsd_cmd", + "qdsd_data0", + "qdsd_data1", + "qdsd_data2", + "qdsd_data3", }; static const struct pinctrl_function msm_pinctrl_functions[] = { @@ -42,7 +42,7 @@ static const char *apq8016_get_pin_name(struct udevice *dev, unsigned int selector) { if (selector < 122) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); return pin_name; } else { return msm_pinctrl_pins[selector - 122]; diff --git a/drivers/pinctrl/qcom/pinctrl-apq8096.c b/drivers/pinctrl/qcom/pinctrl-apq8096.c index d64ab1ff7bee..f2eeb4cf469a 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8096.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8096.c @@ -14,13 +14,13 @@ #define MAX_PIN_NAME_LEN 32 static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { - "SDC1_CLK", - "SDC1_CMD", - "SDC1_DATA", - "SDC2_CLK", - "SDC2_CMD", - "SDC2_DATA", - "SDC1_RCLK", + "sdc1_clk", + "sdc1_cmd", + "sdc1_data", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + "sdc1_rclk", }; static const struct pinctrl_function msm_pinctrl_functions[] = { @@ -37,7 +37,7 @@ static const char *apq8096_get_pin_name(struct udevice *dev, unsigned int selector) { if (selector < 150) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); return pin_name; } else { return msm_pinctrl_pins[selector - 150]; diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c index ac00afa2a1f4..2718afc7859f 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcs404.c +++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c @@ -13,13 +13,13 @@ #define MAX_PIN_NAME_LEN 32 static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { - "SDC1_RCLK", - "SDC1_CLK", - "SDC1_CMD", - "SDC1_DATA", - "SDC2_CLK", - "SDC2_CMD", - "SDC2_DATA", + "sdc1_rclk", + "sdc1_clk", + "sdc1_cmd", + "sdc1_data", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", }; static const struct pinctrl_function msm_pinctrl_functions[] = { @@ -49,7 +49,7 @@ static const char *qcs404_get_pin_name(struct udevice *dev, unsigned int selector) { if (selector < 120) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); return pin_name; } else { return msm_pinctrl_pins[selector - 120];