| Message ID | 20240130-b4-qcom-common-target-v3-35-e523cbf9e556@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | Qualcomm generic board support | expand |
On Tue, 30 Jan 2024 at 19:35, Caleb Connolly <caleb.connolly@linaro.org> wrote: > > Upstream devicetrees label GPIOs with "gpioX", not "GPIO_X", fix this > for SoCs where we're now using upstream DT. > > Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > drivers/pinctrl/qcom/pinctrl-apq8016.c | 26 +++++++++++++------------- > drivers/pinctrl/qcom/pinctrl-apq8096.c | 16 ++++++++-------- > drivers/pinctrl/qcom/pinctrl-qcs404.c | 16 ++++++++-------- Following diff is also required to get rid of pinctrl errors on QCS404: diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c index 2718afc7859f..a6efadd99f28 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcs404.c +++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c @@ -23,7 +23,9 @@ static const char * const msm_pinctrl_pins[] = { }; static const struct pinctrl_function msm_pinctrl_functions[] = { - {"blsp_uart2", 1}, + {"gpio", 0}, + {"blsp_uart_tx_a2", 1}, + {"blsp_uart_rx_a2", 1}, {"rgmii_int", 1}, {"rgmii_ck", 1}, {"rgmii_tx", 1}, -Sumit > 3 files changed, 29 insertions(+), 29 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c > index 8e698085d78b..bcff6abca4a0 100644 > --- a/drivers/pinctrl/qcom/pinctrl-apq8016.c > +++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c > @@ -14,18 +14,18 @@ > #define MAX_PIN_NAME_LEN 32 > static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); > static const char * const msm_pinctrl_pins[] = { > - "SDC1_CLK", > - "SDC1_CMD", > - "SDC1_DATA", > - "SDC2_CLK", > - "SDC2_CMD", > - "SDC2_DATA", > - "QDSD_CLK", > - "QDSD_CMD", > - "QDSD_DATA0", > - "QDSD_DATA1", > - "QDSD_DATA2", > - "QDSD_DATA3", > + "sdc1_clk", > + "sdc1_cmd", > + "sdc1_data", > + "sdc2_clk", > + "sdc2_cmd", > + "sdc2_data", > + "qdsd_clk", > + "qdsd_cmd", > + "qdsd_data0", > + "qdsd_data1", > + "qdsd_data2", > + "qdsd_data3", > }; > > static const struct pinctrl_function msm_pinctrl_functions[] = { > @@ -42,7 +42,7 @@ static const char *apq8016_get_pin_name(struct udevice *dev, > unsigned int selector) > { > if (selector < 122) { > - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); > + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); > return pin_name; > } else { > return msm_pinctrl_pins[selector - 122]; > diff --git a/drivers/pinctrl/qcom/pinctrl-apq8096.c b/drivers/pinctrl/qcom/pinctrl-apq8096.c > index d64ab1ff7bee..f2eeb4cf469a 100644 > --- a/drivers/pinctrl/qcom/pinctrl-apq8096.c > +++ b/drivers/pinctrl/qcom/pinctrl-apq8096.c > @@ -14,13 +14,13 @@ > #define MAX_PIN_NAME_LEN 32 > static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); > static const char * const msm_pinctrl_pins[] = { > - "SDC1_CLK", > - "SDC1_CMD", > - "SDC1_DATA", > - "SDC2_CLK", > - "SDC2_CMD", > - "SDC2_DATA", > - "SDC1_RCLK", > + "sdc1_clk", > + "sdc1_cmd", > + "sdc1_data", > + "sdc2_clk", > + "sdc2_cmd", > + "sdc2_data", > + "sdc1_rclk", > }; > > static const struct pinctrl_function msm_pinctrl_functions[] = { > @@ -37,7 +37,7 @@ static const char *apq8096_get_pin_name(struct udevice *dev, > unsigned int selector) > { > if (selector < 150) { > - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); > + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); > return pin_name; > } else { > return msm_pinctrl_pins[selector - 150]; > diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c > index ac00afa2a1f4..2718afc7859f 100644 > --- a/drivers/pinctrl/qcom/pinctrl-qcs404.c > +++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c > @@ -13,13 +13,13 @@ > #define MAX_PIN_NAME_LEN 32 > static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); > static const char * const msm_pinctrl_pins[] = { > - "SDC1_RCLK", > - "SDC1_CLK", > - "SDC1_CMD", > - "SDC1_DATA", > - "SDC2_CLK", > - "SDC2_CMD", > - "SDC2_DATA", > + "sdc1_rclk", > + "sdc1_clk", > + "sdc1_cmd", > + "sdc1_data", > + "sdc2_clk", > + "sdc2_cmd", > + "sdc2_data", > }; > > static const struct pinctrl_function msm_pinctrl_functions[] = { > @@ -49,7 +49,7 @@ static const char *qcs404_get_pin_name(struct udevice *dev, > unsigned int selector) > { > if (selector < 120) { > - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); > + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); > return pin_name; > } else { > return msm_pinctrl_pins[selector - 120]; > > -- > 2.43.0 >
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c index 8e698085d78b..bcff6abca4a0 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8016.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c @@ -14,18 +14,18 @@ #define MAX_PIN_NAME_LEN 32 static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { - "SDC1_CLK", - "SDC1_CMD", - "SDC1_DATA", - "SDC2_CLK", - "SDC2_CMD", - "SDC2_DATA", - "QDSD_CLK", - "QDSD_CMD", - "QDSD_DATA0", - "QDSD_DATA1", - "QDSD_DATA2", - "QDSD_DATA3", + "sdc1_clk", + "sdc1_cmd", + "sdc1_data", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + "qdsd_clk", + "qdsd_cmd", + "qdsd_data0", + "qdsd_data1", + "qdsd_data2", + "qdsd_data3", }; static const struct pinctrl_function msm_pinctrl_functions[] = { @@ -42,7 +42,7 @@ static const char *apq8016_get_pin_name(struct udevice *dev, unsigned int selector) { if (selector < 122) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); return pin_name; } else { return msm_pinctrl_pins[selector - 122]; diff --git a/drivers/pinctrl/qcom/pinctrl-apq8096.c b/drivers/pinctrl/qcom/pinctrl-apq8096.c index d64ab1ff7bee..f2eeb4cf469a 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8096.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8096.c @@ -14,13 +14,13 @@ #define MAX_PIN_NAME_LEN 32 static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { - "SDC1_CLK", - "SDC1_CMD", - "SDC1_DATA", - "SDC2_CLK", - "SDC2_CMD", - "SDC2_DATA", - "SDC1_RCLK", + "sdc1_clk", + "sdc1_cmd", + "sdc1_data", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + "sdc1_rclk", }; static const struct pinctrl_function msm_pinctrl_functions[] = { @@ -37,7 +37,7 @@ static const char *apq8096_get_pin_name(struct udevice *dev, unsigned int selector) { if (selector < 150) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); return pin_name; } else { return msm_pinctrl_pins[selector - 150]; diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c index ac00afa2a1f4..2718afc7859f 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcs404.c +++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c @@ -13,13 +13,13 @@ #define MAX_PIN_NAME_LEN 32 static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { - "SDC1_RCLK", - "SDC1_CLK", - "SDC1_CMD", - "SDC1_DATA", - "SDC2_CLK", - "SDC2_CMD", - "SDC2_DATA", + "sdc1_rclk", + "sdc1_clk", + "sdc1_cmd", + "sdc1_data", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", }; static const struct pinctrl_function msm_pinctrl_functions[] = { @@ -49,7 +49,7 @@ static const char *qcs404_get_pin_name(struct udevice *dev, unsigned int selector) { if (selector < 120) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); return pin_name; } else { return msm_pinctrl_pins[selector - 120];
Upstream devicetrees label GPIOs with "gpioX", not "GPIO_X", fix this for SoCs where we're now using upstream DT. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> --- drivers/pinctrl/qcom/pinctrl-apq8016.c | 26 +++++++++++++------------- drivers/pinctrl/qcom/pinctrl-apq8096.c | 16 ++++++++-------- drivers/pinctrl/qcom/pinctrl-qcs404.c | 16 ++++++++-------- 3 files changed, 29 insertions(+), 29 deletions(-)