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[92.17.96.230]) by smtp.gmail.com with ESMTPSA id je17-20020a05600c1f9100b0040d1450ca7esm3429723wmb.7.2023.12.19.08.04.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 08:04:27 -0800 (PST) From: Caleb Connolly Date: Tue, 19 Dec 2023 16:04:07 +0000 Subject: [PATCH v2 06/32] serial: msm: add debug UART MIME-Version: 1.0 Message-Id: <20231219-b4-qcom-common-target-v2-6-b6dd9704219e@linaro.org> References: <20231219-b4-qcom-common-target-v2-0-b6dd9704219e@linaro.org> In-Reply-To: <20231219-b4-qcom-common-target-v2-0-b6dd9704219e@linaro.org> To: Neil Armstrong , Sumit Garg , Ramon Fried , Dzmitry Sankouski , Caleb Connolly , Peng Fan , Jaehoon Chung , Rayagonda Kokatanur , Lukasz Majewski , Sean Anderson , Jorge Ramirez-Ortiz , Stephan Gerhold Cc: Marek Vasut , u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=2054; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=jH+8AF/fIJAGRi1jWugRZ+jpQNpEajJizlbvZdgxoXc=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtTG/Uyc2k+ZM3dx3/wp+6v6srOO5/LHO3QWBbxdXW/P9 E1w7kaJjlIWBkEOBlkxRRbxE8ssm9ZettfYvuACzBxWJpAhDFycAjCRanVGhgnzbTfetMnuCpgW f2GpbB2DbmrL31yt3mPKCz9LbnCMOsLwT4v9p0EW9yTRWbLPrj/gbZ97+8h/luPBxje7/60NuRf Hpw0A X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Introduce support for early debugging. Signed-off-by: Caleb Connolly --- drivers/serial/Kconfig | 8 ++++++++ drivers/serial/serial_msm.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 81fdac047824..20713812c839 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -304,6 +304,14 @@ config DEBUG_UART_S5P will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running. +config DEBUG_UART_MSM + bool "Qualcomm QUP UART debug" + depends on ARCH_SNAPDRAGON + help + Select this to enable a debug UART using the serial_msm driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver-model serial is running. + config DEBUG_UART_MSM_GENI bool "Qualcomm snapdragon" depends on ARCH_SNAPDRAGON diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index a22623c316ed..19a5a3a788f7 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -253,3 +253,35 @@ U_BOOT_DRIVER(serial_msm) = { .probe = msm_serial_probe, .ops = &msm_serial_ops, }; + +#ifdef CONFIG_DEBUG_UART_MSM + +static struct msm_serial_data init_serial_data = { + .base = CONFIG_VAL(DEBUG_UART_BASE), + .clk_bit_rate = UART_DM_CLK_RX_TX_BIT_RATE, +}; + +#include + +static inline void _debug_uart_init(void) +{ + uart_dm_init(&init_serial_data); +} + +static inline void _debug_uart_putc(int ch) +{ + struct msm_serial_data *priv = &init_serial_data; + + while (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) && + !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY)) + ; + + writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR); + + writel(1, priv->base + UARTDM_NCF_TX); + writel(ch, priv->base + UARTDM_TF); +} + +DEBUG_UART_FUNCS + +#endif