diff mbox series

[v5,07/10] ARM: rmobile: Add support for Renesas RZ/N1 SoC

Message ID 20230512201522.2295937-8-ralph.siemsen@linaro.org
State Superseded
Headers show
Series Renesas RZ/N1 SoC initial support | expand

Commit Message

Ralph Siemsen May 12, 2023, 8:15 p.m. UTC 
The RZ/N1 is a family of SoC devices from Renesas, featuring:

* ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3
* Integrated SRAM up to 6MB
* Integrated gigabit ethernet switch
* Optional DDR2/3 controller
* I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN, RTC, LCD

Add basic support for this family, modeled on the existing RZA1.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>

---

Changes in v6:
- make the #ifdef a bit clearer

Changes in v5:
- fold mach-rzn1 into mach-rmobile

 arch/arm/mach-rmobile/Kconfig      | 19 +++++++++++++++++++
 arch/arm/mach-rmobile/Kconfig.rzn1 | 20 ++++++++++++++++++++
 arch/arm/mach-rmobile/cpu_info.c   | 10 ++++++++--
 3 files changed, 47 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-rmobile/Kconfig.rzn1

Comments

Marek Vasut May 12, 2023, 8:35 p.m. UTC | #1 
On 5/12/23 22:15, Ralph Siemsen wrote:
> The RZ/N1 is a family of SoC devices from Renesas, featuring:
> 
> * ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3
> * Integrated SRAM up to 6MB
> * Integrated gigabit ethernet switch
> * Optional DDR2/3 controller
> * I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN, RTC, LCD
> 
> Add basic support for this family, modeled on the existing RZA1.
> 
> Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
diff mbox series

Patch

diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig
index 1ef7d68bdf..3061ccd34c 100644
--- a/arch/arm/mach-rmobile/Kconfig
+++ b/arch/arm/mach-rmobile/Kconfig
@@ -48,6 +48,24 @@  config RZA1
 	prompt "Renesas ARM SoCs RZ/A1 (32bit)"
 	select CPU_V7A
 
+config RZN1
+	prompt "Renesas ARM SoCs RZ/N1 (32bit)"
+	select CPU_V7A
+	select ARMV7_SET_CORTEX_SMPEN if !SPL
+	select SPL_ARMV7_SET_CORTEX_SMPEN if SPL
+	select CLK
+	select CLK_RENESAS
+	select CLK_R9A06G032
+	select DM
+	select DM_ETH
+	select DM_SERIAL
+	select PINCTRL
+	select PINCONF
+	select REGMAP
+	select SYSRESET
+	select SYSRESET_SYSCON
+	imply CMD_DM
+
 endchoice
 
 config SYS_SOC
@@ -56,5 +74,6 @@  config SYS_SOC
 source "arch/arm/mach-rmobile/Kconfig.32"
 source "arch/arm/mach-rmobile/Kconfig.64"
 source "arch/arm/mach-rmobile/Kconfig.rza1"
+source "arch/arm/mach-rmobile/Kconfig.rzn1"
 
 endif
diff --git a/arch/arm/mach-rmobile/Kconfig.rzn1 b/arch/arm/mach-rmobile/Kconfig.rzn1
new file mode 100644
index 0000000000..73138d69f9
--- /dev/null
+++ b/arch/arm/mach-rmobile/Kconfig.rzn1
@@ -0,0 +1,20 @@ 
+if RZN1
+
+choice
+	prompt "Renesas RZ/N1 Board select"
+	default TARGET_SCHNEIDER_RZN1
+
+config TARGET_SCHNEIDER_RZN1
+	bool "Schneider RZN1 board"
+	help
+	  Support the Schneider RZN1D and RZN1S boards, which are based
+	  on the Renesas RZ/N1 SoC.
+
+endchoice
+
+config SYS_SOC
+	default "rzn1"
+
+source "board/schneider/rzn1-snarc/Kconfig"
+
+endif
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 7e7465a2c8..71a856ea87 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -30,7 +30,7 @@  void enable_caches(void)
 #endif
 
 #ifdef CONFIG_DISPLAY_CPUINFO
-#ifndef CONFIG_RZA1
+#if !defined(CONFIG_RZA1) && !defined(CONFIG_RZN1)
 __weak const u8 *rzg_get_cpu_name(void)
 {
 	return 0;
@@ -126,11 +126,17 @@  int print_cpuinfo(void)
 
 	return 0;
 }
-#else
+#elif defined(CONFIG_RZA1)
 int print_cpuinfo(void)
 {
 	printf("CPU: Renesas Electronics RZ/A1\n");
 	return 0;
 }
+#else /* CONFIG_RZN1 */
+int print_cpuinfo(void)
+{
+	printf("CPU: Renesas Electronics RZ/N1\n");
+	return 0;
+}
 #endif
 #endif /* CONFIG_DISPLAY_CPUINFO */