From patchwork Thu Nov 10 09:19:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 623328 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1278pvb; Thu, 10 Nov 2022 01:20:18 -0800 (PST) X-Google-Smtp-Source: AA0mqf5cdzhWGsdmH6eGpWMfwSlAnW7ARyyszUZWklTwBhXf+hsfkij22hw9HrYzE6wCRgSaNBh3 X-Received: by 2002:a17:906:f159:b0:7ae:40b7:7fbe with SMTP id gw25-20020a170906f15900b007ae40b77fbemr2167083ejb.371.1668072018593; Thu, 10 Nov 2022 01:20:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668072018; cv=none; d=google.com; s=arc-20160816; b=JMEqsC3CPiUFwHswHU34lAdM4bVdTJSzAamfMG7WiOgUh41OjZb8w/3/F9hpG8FS/a 4FpNmD18RQBMgiJZEQiioO553K195kBj174TCixyYXYk0TPVSBnWJMmQYGA3fZ7IVEoC KY3N6KLorBJW5ZhqQ8R77ZGY4tLk+FI9fCf0kVw/jWo+6wQgT+Gecy2rSRcyYrcWCVXn CcR6oh5V/wDTwradbGXc1ogLu3X0hyaL9vssyj2WV5/kr57YaGdNIqeSK8wPc8zpXSC0 9950Tgtg01oF3btudvc5m8p29W8v0FrcHsdrBBMd3HaovOm5FsyvjrR59tdpzdLgRj2O cnbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=BWkidr7+6TvgHUrJ2dbE3u02WwI/deqUvuojxMR4zmU=; b=Ln87R00BFxEk5DrRHLSslGHNV0dPie32iUwY76pE9du8iyITyggmrDK0ZPfSkIFfDP 9ZVjEOZ1J4z92Sdipl31IPZDOHu+d5uwYSE3DwtUMCPnd4xrrLNugALzw+Km1oI8FOs7 hEZO8ASUABt4GpJ7SGjtUFuhYaRVpLjAhiDAh1iJ0jkrtNR+H6VxbzqLu0agUk8n3SML h/JC0GT4qaiV0xgqXq27IqAYvvBZUY+ejfDxIaQMqUb2SFZ6tNuXv/8HfN6WxA8vhZjJ PKTJvA3aNrqpe6eMT2/e5J6VrFn9QbVZc7dV5GVDNA/oIWZu0njnpcxj3ifCQIG9FErw Lmzw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id ov4-20020a170906fc0400b0078de51e658esi13873577ejb.208.2022.11.10.01.20.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Nov 2022 01:20:18 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 878D5850B9; Thu, 10 Nov 2022 10:19:57 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id DF59F85104; Thu, 10 Nov 2022 10:19:53 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_SOFTFAIL autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id B64F585104 for ; Thu, 10 Nov 2022 10:19:50 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2AF8623A; Thu, 10 Nov 2022 01:19:56 -0800 (PST) Received: from a076522.blr.arm.com (a076522.blr.arm.com [10.162.16.44]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 43BDF3F534; Thu, 10 Nov 2022 01:19:48 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Peter Robinson , Kever Yang , Tom Rini , Sughosh Ganu Subject: [PATCH v5 1/3] rockchip: capsule: Add functions for supporting capsule updates Date: Thu, 10 Nov 2022 14:49:15 +0530 Message-Id: <20221110091917.3966430-2-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110091917.3966430-1-sughosh.ganu@linaro.org> References: <20221110091917.3966430-1-sughosh.ganu@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Add functions needed to support the UEFI capsule update feature on rockchip boards. Currently, the feature is being enabled on the RockPi4 boards with firmware images residing on GPT partitioned storage media. Signed-off-by: Sughosh Ganu Reviewed-by: Kever Yang --- Changes since V4: * Get the pointer to struct efi_fw_image through struct efi_capsule_update_info arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/board.c | 153 +++++++++++++++++++++++++++++++++ 2 files changed, 154 insertions(+) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 69d51ff378..4898260017 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -246,6 +246,7 @@ config ROCKCHIP_RK3399 select DM_PMIC select DM_REGULATOR_FIXED select BOARD_LATE_INIT + imply PARTITION_TYPE_GUID imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_SDRAM_COMMON diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index cbe00d646c..6e05a8f76e 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -6,11 +6,15 @@ #include #include #include +#include #include #include #include +#include +#include #include #include +#include #include #include #include @@ -22,8 +26,157 @@ DECLARE_GLOBAL_DATA_PTR; +#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION) + +#define DFU_ALT_BUF_LEN SZ_1K + +static struct efi_fw_image *fw_images; + +static bool updatable_image(struct disk_partition *info) +{ + int i; + bool ret = false; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < num_image_type_guids; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + ret = true; + break; + } + } + + return ret; +} + +static void set_image_index(struct disk_partition *info, int index) +{ + int i; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < num_image_type_guids; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + fw_images[i].image_index = index; + break; + } + } +} + +static int get_mmc_desc(struct blk_desc **desc) +{ + int ret; + struct mmc *mmc; + struct udevice *dev; + + /* + * For now the firmware images are assumed to + * be on the SD card + */ + ret = uclass_get_device(UCLASS_MMC, 1, &dev); + if (ret) + return -1; + + mmc = mmc_get_mmc_dev(dev); + if (!mmc) + return -ENODEV; + + if ((ret = mmc_init(mmc))) + return ret; + + *desc = mmc_get_blk_desc(mmc); + if (!*desc) + return -1; + + return 0; +} + +void set_dfu_alt_info(char *interface, char *devstr) +{ + const char *name; + bool first = true; + int p, len, devnum, ret; + char buf[DFU_ALT_BUF_LEN]; + struct disk_partition info; + struct blk_desc *desc = NULL; + + ret = get_mmc_desc(&desc); + if (ret) { + log_err("Unable to get mmc desc\n"); + return; + } + + memset(buf, 0, sizeof(buf)); + name = blk_get_uclass_name(desc->uclass_id); + devnum = desc->devnum; + len = strlen(buf); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s %d=", name, devnum); + + for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* Add entry to dfu_alt_info only for updatable images */ + if (updatable_image(&info)) { + if (!first) + len += snprintf(buf + len, + DFU_ALT_BUF_LEN - len, ";"); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s%d_%s part %d %d", + name, devnum, info.name, devnum, p); + first = false; + } + } + + log_debug("dfu_alt_info => %s\n", buf); + env_set("dfu_alt_info", buf); +} + +static void gpt_capsule_update_setup(void) +{ + int p, i, ret; + struct disk_partition info; + struct blk_desc *desc = NULL; + + fw_images = update_info.images; + rockchip_capsule_update_board_setup(); + + ret = get_mmc_desc(&desc); + if (ret) { + log_err("Unable to get mmc desc\n"); + return; + } + + for (p = 1, i = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* + * Since we have a GPT partitioned device, the updatable + * images could be stored in any order. Populate the + * image_index at runtime. + */ + if (updatable_image(&info)) { + set_image_index(&info, i); + i++; + } + } +} +#endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */ + __weak int rk_board_late_init(void) { +#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION) + gpt_capsule_update_setup(); +#endif + return 0; }