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[206.248.184.2]) by smtp.gmail.com with ESMTPSA id g12-20020a056e021a2c00b002dea1e18a94sm1022197ile.47.2022.08.09.06.00.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Aug 2022 06:00:35 -0700 (PDT) From: Ralph Siemsen To: u-boot@lists.denx.de Cc: Ralph Siemsen , Bharat Gooty , Rayagonda Kokatanur Subject: [RFC PATCH v1 7/9] ARM: rzn1: basic support for Renesas RZ/N1 SoC Date: Tue, 9 Aug 2022 08:59:57 -0400 Message-Id: <20220809125959.217333-8-ralph.siemsen@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220809125959.217333-1-ralph.siemsen@linaro.org> References: <20220809125959.217333-1-ralph.siemsen@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The RZ/N1 is a family of SoC devics from Renesas, featuring: * ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3 * Integrated SRAM up to 6MB * Integrated gigabit ethernet switch * Optional DDR2/3 controller * I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN, RTC, LCD Add basic support in the form of ARCH_RZN1 symbol. Signed-off-by: Ralph Siemsen --- arch/arm/Kconfig | 17 +++++++++++++++++ arch/arm/Makefile | 1 + arch/arm/mach-rzn1/Kconfig | 18 ++++++++++++++++++ arch/arm/mach-rzn1/Makefile | 3 +++ arch/arm/mach-rzn1/cpu_info.c | 20 ++++++++++++++++++++ 5 files changed, 59 insertions(+) create mode 100644 arch/arm/mach-rzn1/Kconfig create mode 100644 arch/arm/mach-rzn1/Makefile create mode 100644 arch/arm/mach-rzn1/cpu_info.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 949ebb46ba..e4a4aba4bc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1083,6 +1083,21 @@ config ARCH_RMOBILE imply SYS_THUMB_BUILD imply ARCH_MISC_INIT if DISPLAY_CPUINFO +config ARCH_RZN1 + bool "Reneasa RZ/N1 SoC" + select CLK + select CLK_RENESAS + select CLK_R9A06G032 + select DM + select DM_ETH + select DM_SERIAL + select PINCTRL + select PINCONF + select REGMAP + select SYSRESET + select SYSRESET_SYSCON + imply CMD_DM + config ARCH_SNAPDRAGON bool "Qualcomm Snapdragon SoCs" select ARM64 @@ -2243,6 +2258,8 @@ source "arch/arm/mach-owl/Kconfig" source "arch/arm/mach-rmobile/Kconfig" +source "arch/arm/mach-rzn1/Kconfig" + source "arch/arm/mach-meson/Kconfig" source "arch/arm/mach-mediatek/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 1f4a1d5788..f8b6b35a47 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -76,6 +76,7 @@ machine-$(CONFIG_ARCH_ORION5X) += orion5x machine-$(CONFIG_ARCH_OWL) += owl machine-$(CONFIG_ARCH_RMOBILE) += rmobile machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip +machine-$(CONFIG_ARCH_RZN1) += rzn1 machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga diff --git a/arch/arm/mach-rzn1/Kconfig b/arch/arm/mach-rzn1/Kconfig new file mode 100644 index 0000000000..707895874d --- /dev/null +++ b/arch/arm/mach-rzn1/Kconfig @@ -0,0 +1,18 @@ +if ARCH_RZN1 + +choice + prompt "Target Renesas RZ/N1 SoC select" + default RZN1 + +config RZN1 + bool "Renesas ARM SoCs RZ/N1 (32bit)" + select CPU_V7A + select ARMV7_SET_CORTEX_SMPEN if !SPL + select SPL_ARMV7_SET_CORTEX_SMPEN if SPL + +endchoice + +config SYS_SOC + default "rzn1" + +endif diff --git a/arch/arm/mach-rzn1/Makefile b/arch/arm/mach-rzn1/Makefile new file mode 100644 index 0000000000..b20f845c0f --- /dev/null +++ b/arch/arm/mach-rzn1/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y = cpu_info.o diff --git a/arch/arm/mach-rzn1/cpu_info.c b/arch/arm/mach-rzn1/cpu_info.c new file mode 100644 index 0000000000..af02a26af8 --- /dev/null +++ b/arch/arm/mach-rzn1/cpu_info.c @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include + +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) +void enable_caches(void) +{ + /* FIXME: when enabled, boot hangs at relocate_code */ + //dcache_enable(); +} +#endif + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + printf("CPU: Renesas Electronics RZ/N1\n"); + return 0; +} +#endif