From patchwork Thu Nov 25 07:12:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 519376 Delivered-To: patch@linaro.org Received: by 2002:ac0:c605:0:0:0:0:0 with SMTP id p5csp369045imj; Wed, 24 Nov 2021 23:14:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJzOPEslg5xsk6DosniB97RDgzXx/FVnE6SiY+6UP9Noq382LO7BKV8SBysV/6FHWN5iM4KH X-Received: by 2002:a05:6402:1395:: with SMTP id b21mr36516601edv.299.1637824495581; Wed, 24 Nov 2021 23:14:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1637824495; cv=none; d=google.com; s=arc-20160816; b=fWRBXEwVIYf/VzAp5MULqmjU/dWTK7uedwg4tKKdQ57aQ1epMsjli/kOKYcnspLdJJ rxPgb8+U8jlvI/+I+sjiJG478BSRllMR+5vpU1bBwuLpGV9VLB/Qjv+XUNzNYfrnju0w 4hMiD4c3FexMg+JRYuKhPtJYZk+mFqtxLYmgi9aHd8OgUkkQQrJ4XgJfqAeKotsupksE tE2nbifjIFXdz6R9QpQmNzOWMbW3xHZTXGseV/s99zOu/1KAFFHP2UJ0KmgT8M3Nhik8 GqIIWZCPiiyNcK1xzmZnqIzo+nBipazvLUBMoG4jiZl5u8eTrv3tZNDxg1sVGYsXffuI KIqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:cc:to:from; bh=dJQkVusInXO/bkq83d8w3EB9nli2pD26qGSYfZ0iJ1M=; b=D8BDMiNh/wO1zu8opMJhRnSHLzCqlkEUZKq+gLUCjr/p3sguauLtoAG+ejL4bJITYo fWFlo7G0NIQVB0H4Z3pzsLvp+mC2uzIeYjQkjQKFmH2WQus+xzCPx/UeznGMCLnOgMP6 TA42UODinUpi8x6rmeBwziQMFUodm3F/02Yq7jPAPkD/Css0FoOYYishx/59IctS8tjV PNqzUMxcu01cOgJiq30rJMKYS0CWngE3LNShkkhviWJQ+XsmnUbKRB+RwifOz7CNt46a 5WLAlM85ygZ2cOOt8X8jfG4EbSIQTAmT8mMQSVGYDHlE+ZZ5yMrw9ZVNo1DKwgUi1ajr rPwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id dd7si6582093ejc.344.2021.11.24.23.14.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 23:14:55 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E92BB82F89; Thu, 25 Nov 2021 08:14:21 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 12BA18373E; Thu, 25 Nov 2021 08:13:59 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_SOFTFAIL autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 31C6683679 for ; Thu, 25 Nov 2021 08:13:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 98AA3152F; Wed, 24 Nov 2021 23:13:53 -0800 (PST) Received: from a076522.blr.arm.com (a076522.blr.arm.com [10.162.16.44]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D1AC33F5A1; Wed, 24 Nov 2021 23:13:49 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Patrick Delaunay , Patrice Chotard , Heinrich Schuchardt , Alexander Graf , Simon Glass , Bin Meng , Peng Fan , AKASHI Takahiro , Ilias Apalodimas , Jose Marinho , Grant Likely , Jason Liu , Sughosh Ganu Subject: [RESEND RFC PATCH 06/10] FWU: STM32MP1: Add support to read boot index from backup register Date: Thu, 25 Nov 2021 12:42:58 +0530 Message-Id: <20211125071302.3644-7-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211125071302.3644-1-sughosh.ganu@linaro.org> References: <20211125071302.3644-1-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.37 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The FWU Multi Bank Update feature allows the platform to boot the firmware images from one of the partitions(banks). The first stage bootloader(fsbl) passes the value of the boot index, i.e. the bank from which the firmware images were booted from to U-Boot. On the STM32MP157C-DK2 board, this value is passed through one of the SoC's backup register. Add a function to read the boot index value from the backup register. Signed-off-by: Sughosh Ganu --- arch/arm/mach-stm32mp/include/mach/stm32.h | 1 + board/st/stm32mp1/stm32mp1.c | 7 +++++++ include/fwu_metadata.h | 1 + 3 files changed, 9 insertions(+) diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index c11a9903f2..21ed9f12e4 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -97,6 +97,7 @@ enum boot_device { #define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x) #define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4) #define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5) +#define TAMP_FWU_BOOT_IDX TAMP_BACKUP_REGISTER(10) #define TAMP_COPRO_RSC_TBL_ADDRESS TAMP_BACKUP_REGISTER(17) #define TAMP_COPRO_STATE TAMP_BACKUP_REGISTER(18) #define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(20) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index a6884d2772..32bba71289 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -990,6 +990,13 @@ int fwu_plat_get_blk_desc(struct blk_desc **desc) return 0; } +void fwu_plat_get_bootidx(void *boot_idx) +{ + u32 *bootidx = boot_idx; + + *bootidx = readl(TAMP_FWU_BOOT_IDX); +} + struct fwu_metadata_ops *get_plat_fwu_metadata_ops(void) { if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) && diff --git a/include/fwu_metadata.h b/include/fwu_metadata.h index 6a5e814ab6..44f06f4c6a 100644 --- a/include/fwu_metadata.h +++ b/include/fwu_metadata.h @@ -124,5 +124,6 @@ int fwu_get_metadata(struct fwu_metadata **metadata); int fwu_plat_get_update_index(u32 *update_idx); int fwu_plat_get_blk_desc(struct blk_desc **desc); +void fwu_plat_get_bootidx(void *boot_idx); #endif /* _FWU_METADATA_H_ */