diff mbox series

[next,v4,04/11] ARM: dts: ast2600: Add HACE to device tree

Message ID 20210916085221.6388-5-chiawei_wang@aspeedtech.com
State New
Headers show
Series None | expand

Commit Message

ChiaWei Wang Sept. 16, 2021, 8:52 a.m. UTC 
From: Joel Stanley <joel@jms.id.au>


Add HACE DTS node and enable it for AST2600 EVB.

Signed-off-by: Joel Stanley <joel@jms.id.au>

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>

---
 arch/arm/dts/ast2600-evb.dts | 5 +++++
 arch/arm/dts/ast2600.dtsi    | 8 ++++++++
 2 files changed, 13 insertions(+)

-- 
2.17.1
diff mbox series

Patch

diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index 2abd31341c..adb80a30ef 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -177,3 +177,8 @@ 
 			  0x08 0x04
 			  0x08 0x04>;
 };
+
+&hace {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index ac0f08b7ea..642206fb77 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -187,6 +187,14 @@ 
 			};
 		};
 
+		hace: hace@1e6d0000 {
+			compatible = "aspeed,ast2600-hace";
+			reg = <0x1e6d0000 0x200>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&scu ASPEED_CLK_GATE_YCLK>;
+			status = "disabled";
+		};
+
 		edac: sdram@1e6e0000 {
 			compatible = "aspeed,ast2600-sdram-edac";
 			reg = <0x1e6e0000 0x174>;