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[111.184.129.17]) by smtp.gmail.com with ESMTPSA id n185sm14900418pfn.171.2021.08.22.19.43.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Aug 2021 19:43:18 -0700 (PDT) From: Ying-Chun Liu To: u-boot@lists.denx.de Cc: "Ying-Chun Liu (PaulLiu)" , Fabio Estevam , Frieder Schrempf , uboot-imx Subject: [PATCH 1/1] imx8m: Restrict usable memory based on rom_pointer[0] Date: Mon, 23 Aug 2021 10:43:06 +0800 Message-Id: <20210823024306.2046708-2-grandpaul@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210823024306.2046708-1-grandpaul@gmail.com> References: <20210823024306.2046708-1-grandpaul@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: "Ying-Chun Liu (PaulLiu)" When TEE is loaded, we need to restrict the memory usage based on rom_pointer[0] Signed-off-by: Ying-Chun Liu (PaulLiu) Cc: Fabio Estevam Cc: Frieder Schrempf Cc: uboot-imx --- arch/arm/mach-imx/imx8m/soc.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) -- 2.32.0 Reviewed-by: Frieder Schrempf diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index f2ddc834d4..863508776d 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -298,16 +298,26 @@ phys_size_t get_effective_memsize(void) ulong board_get_usable_ram_top(ulong total_size) { + ulong top_addr = PHYS_SDRAM + gd->ram_size; + /* * Some IPs have their accessible address space restricted by * the interconnect. Let's make sure U-Boot only ever uses the * space below the 4G address boundary (which is 3GiB big), * even when the effective available memory is bigger. */ - if (PHYS_SDRAM + gd->ram_size > 0x80000000) - return 0x80000000; + if (top_addr > 0x80000000) + top_addr = 0x80000000; + + /* + * rom_pointer[0] stores the TEE memory start address. + * rom_pointer[1] stores the size TEE uses. + * We need to reserve the memory region for TEE. + */ + if (rom_pointer[0] && rom_pointer[1] && top_addr > rom_pointer[0]) + top_addr = rom_pointer[0]; - return PHYS_SDRAM + gd->ram_size; + return top_addr; } static u32 get_cpu_variant_type(u32 type)