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Mon, 19 Jul 2021 07:14:44 +0000 From: "Peng Fan (OSS)" To: sbabic@denx.de, festevam@gmail.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, Peng Fan Subject: [Patch V3 28/44] arm: imx8ulp: add trdc release request Date: Mon, 19 Jul 2021 15:47:18 +0800 Message-Id: <20210719074734.29170-29-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210719074734.29170-1-peng.fan@oss.nxp.com> References: <20210719074734.29170-1-peng.fan@oss.nxp.com> X-ClientProxiedBy: SGAP274CA0006.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::18) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SGAP274CA0006.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4331.21 via Frontend Transport; Mon, 19 Jul 2021 07:14:42 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 223b2c52-4584-4d67-8085-08d94a84e255 X-MS-TrafficTypeDiagnostic: DBAPR04MB7302: X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:159; 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Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) -- 2.30.0 diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 62c02a6223..43fe62c2fd 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -344,17 +344,23 @@ static void set_core0_reset_vector(u32 entry) setbits_le32(SIM1_BASE_ADDR + 0x8, (0x1 << 26)); } -static int release_xrdc(void) +enum rdc_type { + RDC_TRDC, + RDC_XRDC, +}; + +static int release_rdc(enum rdc_type type) { ulong s_mu_base = 0x27020000UL; struct imx8ulp_s400_msg msg; int ret; + u32 rdc_id = (type == RDC_XRDC) ? 0x78 : 0x74; msg.version = AHAB_VERSION; msg.tag = AHAB_CMD_TAG; msg.size = 2; msg.command = AHAB_RELEASE_RDC_REQ_CID; - msg.data[0] = (0x78 << 8) | 0x2; /* A35 XRDC */ + msg.data[0] = (rdc_id << 8) | 0x2; /* A35 XRDC */ mu_hal_init(s_mu_base); mu_hal_sendmsg(s_mu_base, 0, *((u32 *)&msg)); @@ -363,13 +369,12 @@ static int release_xrdc(void) ret = mu_hal_receivemsg(s_mu_base, 0, (u32 *)&msg); if (!ret) { ret = mu_hal_receivemsg(s_mu_base, 1, &msg.data[0]); - if (!ret) - return ret; + if (!ret) { + if ((msg.data[0] & 0xff) == 0xd6) + return 0; + } - if ((msg.data[0] & 0xff) == 0) - return 0; - else - return -EIO; + return -EIO; } return ret; @@ -423,8 +428,11 @@ int arch_cpu_init(void) /* Disable wdog */ init_wdog(); + if (get_boot_mode() == SINGLE_BOOT) + release_rdc(RDC_TRDC); + /* release xrdc, then allow A35 to write SRAM2 */ - release_xrdc(); + release_rdc(RDC_XRDC); xrdc_mrc_region_set_access(2, CONFIG_SPL_TEXT_BASE, 0xE00); clock_init();