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Wed, 16 Sep 2020 06:53:18 +0000 From: peng.fan@nxp.com To: sbabic@denx.de, festevam@gmail.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, Peng Fan , Ye Li Subject: [PATCH 5/5] imx8mp: Remove parts MIMX8ML7 and MIMX8ML5 support Date: Wed, 16 Sep 2020 15:17:22 +0800 Message-Id: <20200916071722.28772-5-peng.fan@nxp.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200916071722.28772-1-peng.fan@nxp.com> References: <20200916071722.28772-1-peng.fan@nxp.com> X-ClientProxiedBy: SG2PR06CA0230.apcprd06.prod.outlook.com (2603:1096:4:ac::14) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR06CA0230.apcprd06.prod.outlook.com (2603:1096:4:ac::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3391.11 via Frontend Transport; Wed, 16 Sep 2020 06:53:15 +0000 X-Mailer: git-send-email 2.28.0 X-Originating-IP: [119.31.174.71] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 9b9d3485-d08f-455c-7538-08d85a0d311d X-MS-TrafficTypeDiagnostic: DB7PR04MB4762: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2657; 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Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx/cpu.h | 2 -- arch/arm/include/asm/mach-imx/sys_proto.h | 5 +---- arch/arm/mach-imx/cpu.c | 4 ---- arch/arm/mach-imx/imx8m/soc.c | 12 ++++-------- 4 files changed, 5 insertions(+), 18 deletions(-) -- 2.28.0 diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 75ff991248..f37fe21446 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -41,9 +41,7 @@ #define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */ #define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */ #define MXC_CPU_IMX8MP 0x182/* dummy ID */ -#define MXC_CPU_IMX8MP7 0x183 /* dummy ID */ #define MXC_CPU_IMX8MP6 0x184 /* dummy ID */ -#define MXC_CPU_IMX8MP5 0x185 /* dummy ID */ #define MXC_CPU_IMX8MPL 0x186 /* dummy ID */ #define MXC_CPU_IMX8MPD 0x187 /* dummy ID */ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 15d1cba8e7..5f0c1ae218 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -67,13 +67,10 @@ struct bd_info; #define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL)) #define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL)) #define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \ - is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP7) || \ - is_cpu_type(MXC_CPU_IMX8MP6) || is_cpu_type(MXC_CPU_IMX8MP5)) + is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP6)) #define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD)) #define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL)) -#define is_imx8mp7() (is_cpu_type(MXC_CPU_IMX8MP7)) #define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6)) -#define is_imx8mp5() (is_cpu_type(MXC_CPU_IMX8MP5)) #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index fe8d5947cc..4a175cb86f 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -102,12 +102,8 @@ const char *get_imx_type(u32 imxtype) return "8MP Dual[3]"; /* Dual-core version of the imx8mp */ case MXC_CPU_IMX8MPL: return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */ - case MXC_CPU_IMX8MP7: - return "8MP[7]"; /* Quad-core version of the imx8mp, VPU fused */ case MXC_CPU_IMX8MP6: return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */ - case MXC_CPU_IMX8MP5: - return "8MP[5]"; /* Quad-core version of the imx8mp, ISP fused */ case MXC_CPU_IMX8MN: return "8MNano Quad"; /* Quad-core version */ case MXC_CPU_IMX8MND: diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 8dfc8645fc..9bca5bf972 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -343,12 +343,8 @@ static u32 get_cpu_variant_type(u32 type) switch (flag) { case 7: return MXC_CPU_IMX8MPL; - case 6: - return MXC_CPU_IMX8MP5; case 2: return MXC_CPU_IMX8MP6; - case 1: - return MXC_CPU_IMX8MP7; default: break; } @@ -889,16 +885,16 @@ usb_modify_speed: disable_cpu_nodes(blob, 3); #elif defined(CONFIG_IMX8MP) - if (is_imx8mpl() || is_imx8mp7()) + if (is_imx8mpl()) disable_vpu_nodes(blob); - if (is_imx8mpl() || is_imx8mp6() || is_imx8mp5()) + if (is_imx8mpl() || is_imx8mp6()) disable_npu_nodes(blob); - if (is_imx8mpl() || is_imx8mp5()) + if (is_imx8mpl()) disable_isp_nodes(blob); - if (is_imx8mpl() || is_imx8mp7() || is_imx8mp6() || is_imx8mp5()) + if (is_imx8mpl() || is_imx8mp6()) disable_dsp_nodes(blob); if (is_imx8mpd())