From patchwork Thu Jul 9 06:08:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 241080 List-Id: U-Boot discussion From: yamada.masahiro at socionext.com (Masahiro Yamada) Date: Thu, 9 Jul 2020 15:08:13 +0900 Subject: [PATCH 03/10] ARM: uniphier: consolidate SoC select menu In-Reply-To: <20200709060820.121087-1-yamada.masahiro@socionext.com> References: <20200709060820.121087-1-yamada.masahiro@socionext.com> Message-ID: <20200709060820.121087-3-yamada.masahiro@socionext.com> Currently, the supports for the following two ARMv7 SoC groups are exclusive, because the boot ROM loads the SPL to a different address: - LD4, sLD8 (SPL is loaded at 0x00040000) - Pro4, Pro5, PXs2, LD6b (SPL is loaded at 0x00100000) This limitation exists only when CONFIG_SPL=y. Instead of using crappy CONFIG options, checking SPL and SPL_TEXT_BASE is cleaner. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Kconfig | 33 +++++++++++++---------------- configs/uniphier_ld4_sld8_defconfig | 1 - 2 files changed, 15 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index bfb445a602..e125f50fa6 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -3,24 +3,15 @@ if ARCH_UNIPHIER config SYS_CONFIG_NAME default "uniphier" -config ARCH_UNIPHIER_32BIT - bool - select ARCH_SUPPORT_PSCI - select ARMV7_NONSEC - select CPU_V7A - select CPU_V7_HAS_NONSEC - choice prompt "UniPhier SoC select" - default ARCH_UNIPHIER_V7_MULTI - -config ARCH_UNIPHIER_LD4_SLD8 - bool "UniPhier LD4/sLD8 SoCs" - select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_V7_MULTI - bool "UniPhier Pro4/Pro5/PXs2/LD6b SoCs" - select ARCH_UNIPHIER_32BIT + bool "UniPhier V7 SoCs" + select ARCH_SUPPORT_PSCI + select ARMV7_NONSEC + select CPU_V7A + select CPU_V7_HAS_NONSEC config ARCH_UNIPHIER_V8_MULTI bool "UniPhier V8 SoCs" @@ -32,32 +23,38 @@ endchoice config ARCH_UNIPHIER_LD4 bool "Enable UniPhier LD4 SoC support" - depends on ARCH_UNIPHIER_LD4_SLD8 + depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00040000 default y config ARCH_UNIPHIER_SLD8 bool "Enable UniPhier sLD8 SoC support" - depends on ARCH_UNIPHIER_LD4_SLD8 + depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00040000 default y config ARCH_UNIPHIER_PRO4 bool "Enable UniPhier Pro4 SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_PRO5 bool "Enable UniPhier Pro5 SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_PXS2 bool "Enable UniPhier Pxs2 SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_LD6B bool "Enable UniPhier LD6b SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_LD11 @@ -78,7 +75,7 @@ config ARCH_UNIPHIER_PXS3 config CACHE_UNIPHIER bool "Enable the UniPhier L2 cache controller" - depends on ARCH_UNIPHIER_32BIT + depends on ARCH_UNIPHIER_V7_MULTI default y select SYS_CACHE_SHIFT_7 help @@ -118,5 +115,5 @@ config CMD_DDRMPHY_DUMP training; it is useful for the evaluation of DDR Multi PHY training. config SYS_SOC - default "uniphier-v7" if ARCH_UNIPHIER_LD4_SLD8 || ARCH_UNIPHIER_V7_MULTI + default "uniphier-v7" if ARCH_UNIPHIER_V7_MULTI endif diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 2e809cacb5..cb1e8c9bb7 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y -CONFIG_ARCH_UNIPHIER_LD4_SLD8=y CONFIG_MICRO_SUPPORT_CARD=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"