From patchwork Thu Jun 18 17:45:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 242621 List-Id: U-Boot discussion From: jagan at amarulasolutions.com (Jagan Teki) Date: Thu, 18 Jun 2020 23:15:13 +0530 Subject: [PATCH v3 1/4] spi: kirkwood: Drop nondm code In-Reply-To: <20200618174516.239626-1-jagan@amarulasolutions.com> References: <20200618174516.239626-1-jagan@amarulasolutions.com> Message-ID: <20200618174516.239626-2-jagan@amarulasolutions.com> From: Bhargav Shah Drop the nondm code from kirkwood_spi.c since there is no board or any other code using for it. Signed-off-by: Bhargav Shah Signed-off-by: Jagan Teki --- Changes for v3: - updated commit message - updated config_whitelist.txt drivers/spi/Kconfig | 12 ++-- drivers/spi/kirkwood_spi.c | 136 ++++------------------------------- scripts/config_whitelist.txt | 1 - 3 files changed, 19 insertions(+), 130 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 09b9cb17d8..0945177efb 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -162,6 +162,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config KIRKWOOD_SPI + bool "Marvell Kirkwood SPI Driver" + help + Enable support for SPI on various Marvell SoCs, such as + Kirkwood and Armada 375. + config MESON_SPIFC bool "Amlogic Meson SPI Flash Controller driver" depends on ARCH_MESON @@ -417,12 +423,6 @@ config SH_QSPI Enable the Renesas Quad SPI controller driver. This driver can be used on Renesas SoCs. -config KIRKWOOD_SPI - bool "Marvell Kirkwood SPI Driver" - help - Enable support for SPI on various Marvell SoCs, such as - Kirkwood and Armada 375. - config MXC_SPI bool "MXC SPI Driver" help diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 3986b06b25..92dc2e13c5 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -19,6 +19,19 @@ #endif #include +struct mvebu_spi_dev { + bool is_errata_50mhz_ac; +}; + +struct mvebu_spi_platdata { + struct kwspi_registers *spireg; + bool is_errata_50mhz_ac; +}; + +struct mvebu_spi_priv { + struct kwspi_registers *spireg; +}; + static void _spi_cs_activate(struct kwspi_registers *reg) { setbits_le32(®->ctrl, KWSPI_CSN_ACT); @@ -94,128 +107,6 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, return 0; } -#ifndef CONFIG_DM_SPI - -static struct kwspi_registers *spireg = - (struct kwspi_registers *)MVEBU_SPI_BASE; - -#ifdef CONFIG_ARCH_KIRKWOOD -static u32 cs_spi_mpp_back[2]; -#endif - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct spi_slave *slave; - u32 data; -#ifdef CONFIG_ARCH_KIRKWOOD - static const u32 kwspi_mpp_config[2][2] = { - { MPP0_SPI_SCn, 0 }, /* if cs == 0 */ - { MPP7_SPI_SCn, 0 } /* if cs != 0 */ - }; -#endif - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - slave = spi_alloc_slave_base(bus, cs); - if (!slave) - return NULL; - - writel(KWSPI_SMEMRDY, &spireg->ctrl); - - /* calculate spi clock prescaller using max_hz */ - data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10; - data = data < KWSPI_CLKPRESCL_MIN ? KWSPI_CLKPRESCL_MIN : data; - data = data > KWSPI_CLKPRESCL_MASK ? KWSPI_CLKPRESCL_MASK : data; - - /* program spi clock prescaller using max_hz */ - writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); - debug("data = 0x%08x\n", data); - - writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); - writel(KWSPI_IRQMASK, &spireg->irq_mask); - -#ifdef CONFIG_ARCH_KIRKWOOD - /* program mpp registers to select SPI_CSn */ - kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back); -#endif - - return slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ -#ifdef CONFIG_ARCH_KIRKWOOD - kirkwood_mpp_conf(cs_spi_mpp_back, NULL); -#endif - free(slave); -} - -__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return board_spi_claim_bus(slave); -} - -__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave) -{ -} - -void spi_release_bus(struct spi_slave *slave) -{ - board_spi_release_bus(slave); -} - -#ifndef CONFIG_SPI_CS_IS_VALID -/* - * you can define this function board specific - * define above CONFIG in board specific config file and - * provide the function in board specific src file - */ -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && (cs == 0 || cs == 1); -} -#endif - -void spi_cs_activate(struct spi_slave *slave) -{ - _spi_cs_activate(spireg); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - _spi_cs_deactivate(spireg); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - return _spi_xfer(spireg, bitlen, dout, din, flags); -} - -#else - -/* Here now the DM part */ - -struct mvebu_spi_dev { - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_platdata { - struct kwspi_registers *spireg; - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_priv { - struct kwspi_registers *spireg; -}; - static int mvebu_spi_set_speed(struct udevice *bus, uint hz) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -409,4 +300,3 @@ U_BOOT_DRIVER(mvebu_spi) = { .priv_auto_alloc_size = sizeof(struct mvebu_spi_priv), .probe = mvebu_spi_probe, }; -#endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f6bf6f2474..e6f5bd7e6d 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1619,7 +1619,6 @@ CONFIG_SPEAR_USBBOOT CONFIG_SPEAR_USBTTY CONFIG_SPI_ADDR CONFIG_SPI_BOOTING -CONFIG_SPI_CS_IS_VALID CONFIG_SPI_DATAFLASH_WRITE_VERIFY CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE