diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e8701d2603..750779d20f 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -2,6 +2,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/sandbox-gpio.h>
+#include <dt-bindings/mux/mux.h>
 
 / {
 	model = "sandbox";
@@ -115,6 +116,11 @@
 		int64-value = /bits/ 64 <0x1111222233334444>;
 		int-array = <5678 9123 4567>;
 		interrupts-extended = <&irq 3 0>;
+
+		mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
+			       <&muxcontroller0 2>, <&muxcontroller0 3>;
+		mux-control-names = "mux0", "mux1", "mux2", "mux3";
+		mux-syscon = <&syscon3>;
 	};
 
 	another-test {
@@ -158,6 +164,9 @@
 		compatible = "denx,u-boot-fdt-test";
 		ping-expect = <3>;
 		ping-add = <3>;
+
+		mux-controls = <&muxcontroller0 0>;
+		mux-control-names = "mux0";
 	};
 
 	phy_provider0: gen_phy at 0 {
@@ -787,6 +796,22 @@
 			0x58 8>;
 	};
 
+	syscon3: syscon at 3 {
+		compatible = "simple-mfd", "syscon";
+		reg = <0x000100 0x10>;
+
+		muxcontroller0: a-mux-controller {
+			compatible = "mmio-mux";
+			#mux-control-cells = <1>;
+
+			mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
+					<0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
+					<0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
+			idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
+			u-boot,mux-autoprobe;
+		};
+	};
+
 	timer {
 		compatible = "sandbox,timer";
 		clock-frequency = <1000000>;
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 5b7569319b..c301d11992 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -154,6 +154,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MULTIPLEXER=y
+CONFIG_MUX_MMIO=y
 CONFIG_DM_ETH=y
 CONFIG_NVME=y
 CONFIG_PCI=y
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 6c18fd04ce..d7ab7e27f7 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_DM_SPI_FLASH) += sf.o
 obj-$(CONFIG_SMEM) += smem.o
 obj-$(CONFIG_DM_SPI) += spi.o
 obj-y += syscon.o
+obj-$(CONFIG_MUX_MMIO) += mux-mmio.o
 obj-$(CONFIG_DM_USB) += usb.o
 obj-$(CONFIG_DM_PMIC) += pmic.o
 obj-$(CONFIG_DM_REGULATOR) += regulator.o
diff --git a/test/dm/mux-mmio.c b/test/dm/mux-mmio.c
new file mode 100644
index 0000000000..91c383324f
--- /dev/null
+++ b/test/dm/mux-mmio.c
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Jean-Jacques Hiblot <jjhiblot at ti.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <dm.h>
+#include <mux.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/test.h>
+#include <dm/root.h>
+#include <dm/test.h>
+#include <dm/util.h>
+#include <dm/device-internal.h>
+#include <test/ut.h>
+
+/* Test that mmio mux work correctly */
+static int dm_test_mux_mmio_default_state(struct unit_test_state *uts)
+{
+	struct udevice *dev, *dev_b;
+	struct regmap *map;
+	u32 val;
+
+	sandbox_set_enable_memio(true);
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
+					      &dev));
+	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
+					      &dev_b));
+	map = syscon_regmap_lookup_by_phandle(dev, "mux-syscon");
+	ut_assertok_ptr(map);
+	ut_assert(map);
+
+	/* Check default states. */
+	ut_assertok(regmap_read(map, 0xc, &val));
+	ut_asserteq(0x02, (val & 0x1E) >> 1);
+	ut_assertok(regmap_read(map, 0x4, &val));
+	ut_asserteq(0x73, (val & 0xFF) >> 0);
+
+	return 0;
+}
+DM_TEST(dm_test_mux_mmio_default_state, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int dm_test_mux_mmio_select(struct unit_test_state *uts)
+{
+	struct udevice *dev, *dev_b;
+	struct regmap *map;
+	struct mux_control *ctl0_a, *ctl0_b;
+	struct mux_control *ctl1;
+	struct mux_control *ctl_err;
+	u32 val;
+	int i;
+
+	sandbox_set_enable_memio(true);
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
+					      &dev));
+	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
+					      &dev_b));
+	map = syscon_regmap_lookup_by_phandle(dev, "mux-syscon");
+	ut_assertok_ptr(map);
+	ut_assert(map);
+
+	ut_assertok(mux_control_get(dev, "mux0", &ctl0_a));
+	ut_assertok(mux_control_get(dev, "mux1", &ctl1));
+	ut_asserteq(-ERANGE, mux_control_get(dev, "mux3", &ctl_err));
+	ut_asserteq(-ENODATA, mux_control_get(dev, "dummy", &ctl_err));
+	ut_assertok(mux_control_get(dev_b, "mux0", &ctl0_b));
+
+	for (i = 0; i < mux_control_states(ctl0_a); i++) {
+		/* Select a new state and verify the value in the regmap. */
+		ut_assertok(mux_control_select(ctl0_a, i));
+		ut_assertok(regmap_read(map, 0, &val));
+		ut_asserteq(i, (val & 0x30) >> 4);
+		/*
+		 * Deselect the mux and verify that the value in the regmap
+		 * reflects the idle state (fixed to MUX_IDLE_AS_IS).
+		 */
+		ut_assertok(mux_control_deselect(ctl0_a));
+		ut_assertok(regmap_read(map, 0, &val));
+		ut_asserteq(i, (val & 0x30) >> 4);
+	}
+
+	for (i = 0; i < mux_control_states(ctl1); i++) {
+		/* Select a new state and verify the value in the regmap. */
+		ut_assertok(mux_control_select(ctl1, i));
+		ut_assertok(regmap_read(map, 0xc, &val));
+		ut_asserteq(i, (val & 0x1E) >> 1);
+		/*
+		 * Deselect the mux and verify that the value in the regmap
+		 * reflects the idle state (fixed to 2).
+		 */
+		ut_assertok(mux_control_deselect(ctl1));
+		ut_assertok(regmap_read(map, 0xc, &val));
+		ut_asserteq(2, (val & 0x1E) >> 1);
+	}
+
+	/* Try unbalanced selection/deselection. */
+	ut_assertok(mux_control_select(ctl0_a, 0));
+	ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 1));
+	ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 0));
+	ut_assertok(mux_control_deselect(ctl0_a));
+
+	/* Try concurrent selection. */
+	ut_assertok(mux_control_select(ctl0_a, 0));
+	ut_assert(mux_control_select(ctl0_b, 0));
+	ut_assertok(mux_control_deselect(ctl0_a));
+	ut_assertok(mux_control_select(ctl0_b, 0));
+	ut_assert(mux_control_select(ctl0_a, 0));
+	ut_assertok(mux_control_deselect(ctl0_b));
+	ut_assertok(mux_control_select(ctl0_a, 0));
+	ut_assertok(mux_control_deselect(ctl0_a));
+
+	return 0;
+}
+DM_TEST(dm_test_mux_mmio_select, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that managed API for mux work correctly */
+static int dm_test_devm_mux_mmio(struct unit_test_state *uts)
+{
+	struct udevice *dev, *dev_b;
+	struct mux_control *ctl0_a, *ctl0_b;
+	struct mux_control *ctl1;
+	struct mux_control *ctl_err;
+
+	sandbox_set_enable_memio(true);
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
+					      &dev));
+	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
+					      &dev_b));
+
+	ctl0_a = devm_mux_control_get(dev, "mux0");
+	ut_assertok_ptr(ctl0_a);
+	ut_assert(ctl0_a);
+	ctl1 = devm_mux_control_get(dev, "mux1");
+	ut_assertok_ptr(ctl1);
+	ut_assert(ctl1);
+	ctl_err = devm_mux_control_get(dev, "mux3");
+	ut_asserteq(-ERANGE, PTR_ERR(ctl_err));
+	ctl_err = devm_mux_control_get(dev, "dummy");
+	ut_asserteq(-ENODATA, PTR_ERR(ctl_err));
+
+	ctl0_b = devm_mux_control_get(dev_b, "mux0");
+	ut_assertok_ptr(ctl0_b);
+	ut_assert(ctl0_b);
+
+	/* Try concurrent selection. */
+	ut_assertok(mux_control_select(ctl0_a, 0));
+	ut_assert(mux_control_select(ctl0_b, 0));
+	ut_assertok(mux_control_deselect(ctl0_a));
+	ut_assertok(mux_control_select(ctl0_b, 0));
+	ut_assert(mux_control_select(ctl0_a, 0));
+	ut_assertok(mux_control_deselect(ctl0_b));
+
+	/* Remove one device and check that the mux is released. */
+	ut_assertok(mux_control_select(ctl0_a, 0));
+	ut_assert(mux_control_select(ctl0_b, 0));
+	device_remove(dev, DM_REMOVE_NORMAL);
+	ut_assertok(mux_control_select(ctl0_b, 0));
+
+	device_remove(dev_b, DM_REMOVE_NORMAL);
+	return 0;
+}
+DM_TEST(dm_test_devm_mux_mmio, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
