diff mbox series

[v3,07/15] dt-bindings: memory: ns3: update GIC LPI address

Message ID 20200610104120.30668-8-rayagonda.kokatanur@broadcom.com
State Superseded
Headers show
Series add initial support for broadcom NS3 soc | expand

Commit Message

Rayagonda Kokatanur June 10, 2020, 10:41 a.m. UTC
Update NS3 GIC LPI address.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
---
 include/dt-bindings/memory/bcm-ns3-mc.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Simon Glass June 26, 2020, 1:11 a.m. UTC | #1
On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur
<rayagonda.kokatanur at broadcom.com> wrote:
>
> Update NS3 GIC LPI address.
>
> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
> ---
>  include/dt-bindings/memory/bcm-ns3-mc.h | 3 +++
>  1 file changed, 3 insertions(+)
>

Reviewed-by: Simon Glass <sjg at chromium.org>

Lower case hex

Can these be in the device tree and use a driver, like syscon maybe?


> diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h
> index b4f78584a5..d6e7717ba2 100644
> --- a/include/dt-bindings/memory/bcm-ns3-mc.h
> +++ b/include/dt-bindings/memory/bcm-ns3-mc.h
> @@ -31,4 +31,7 @@
>  #define BCM_NS3_MEM_CRMU_PT_START  0x880000000
>  #define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
>
> +#define BCM_NS3_GIC_LPI_BASE      0x8AD70000
> +#define BCM_NS3_GIC_LPI_SIZE      0x90000
> +
>  #endif
> --
> 2.17.1
>
diff mbox series

Patch

diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h
index b4f78584a5..d6e7717ba2 100644
--- a/include/dt-bindings/memory/bcm-ns3-mc.h
+++ b/include/dt-bindings/memory/bcm-ns3-mc.h
@@ -31,4 +31,7 @@ 
 #define BCM_NS3_MEM_CRMU_PT_START  0x880000000
 #define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
 
+#define BCM_NS3_GIC_LPI_BASE      0x8AD70000
+#define BCM_NS3_GIC_LPI_SIZE      0x90000
+
 #endif