From patchwork Wed Jun 10 08:13:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Tang X-Patchwork-Id: 242035 List-Id: U-Boot discussion From: andy.tang at nxp.com (andy.tang at nxp.com) Date: Wed, 10 Jun 2020 16:13:50 +0800 Subject: [PATCH] armv8: ls1028ardb: add xspi parameter to qixis command Message-ID: <20200610081350.20881-1-andy.tang@nxp.com> From: Yuantian Tang Add xspi boot source to qixis command to let the soc boot from flex-nor flash chip. Signed-off-by: Yuantian Tang --- board/freescale/common/qixis.c | 13 +++++++++++++ include/configs/ls1028ardb.h | 4 ++-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c index dd1ee90b3c..f4a8ad78c0 100644 --- a/board/freescale/common/qixis.c +++ b/board/freescale/common/qixis.c @@ -322,6 +322,19 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar QIXIS_RCFG_CTL_RECONFIG_START); #else printf("Not implemented\n"); +#endif + } else if (strcmp(argv[1], "xspi") == 0) { +#ifdef QIXIS_LBMAP_XSPI + QIXIS_WRITE(rst_ctl, 0x30); + QIXIS_WRITE(rcfg_ctl, 0); + set_lbmap(QIXIS_LBMAP_XSPI); + set_rcw_src(QIXIS_RCW_SRC_XSPI); + qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), + QIXIS_RCFG_CTL_RECONFIG_IDLE); + qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), + QIXIS_RCFG_CTL_RECONFIG_START); +#else + printf("Not implemented\n"); #endif } else if (strcmp(argv[1], "watchdog") == 0) { static char *period[9] = {"2s", "4s", "8s", "16s", "32s", diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 0f289cb078..4d65d5d38b 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -38,10 +38,10 @@ #define QIXIS_LBMAP_ALTBANK 0x00 #define QIXIS_LBMAP_SD 0x00 #define QIXIS_LBMAP_EMMC 0x00 -#define QIXIS_LBMAP_QSPI 0x00 +#define QIXIS_LBMAP_XSPI 0x00 #define QIXIS_RCW_SRC_SD 0xf8 #define QIXIS_RCW_SRC_EMMC 0xf9 -#define QIXIS_RCW_SRC_QSPI 0xff +#define QIXIS_RCW_SRC_XSPI 0xff #define QIXIS_RST_CTL_RESET 0x31 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10 #define QIXIS_RCFG_CTL_RECONFIG_START 0x11