From patchwork Thu Jun 4 15:16:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhiqiang Hou X-Patchwork-Id: 241696 List-Id: U-Boot discussion From: Zhiqiang.Hou at nxp.com (Zhiqiang Hou) Date: Thu, 4 Jun 2020 23:16:35 +0800 Subject: [PATCHv3 06/36] dts: P1020RDB: Add ESPI slave device node In-Reply-To: <20200604151705.7582-1-Zhiqiang.Hou@nxp.com> References: <20200604151705.7582-1-Zhiqiang.Hou@nxp.com> Message-ID: <20200604151705.7582-7-Zhiqiang.Hou@nxp.com> From: Xiaowei Bao Add ESPI slave node for P1020RDB. Signed-off-by: Xiaowei Bao Signed-off-by: Hou Zhiqiang --- V3: - No change. arch/powerpc/dts/p1020rdb-pc.dts | 15 +++++++++++++++ arch/powerpc/dts/p1020rdb-pc_36b.dts | 15 +++++++++++++++ arch/powerpc/dts/p1020rdb-pd.dts | 15 +++++++++++++++ 3 files changed, 45 insertions(+) diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts index 7ebaa619df..4193af10c9 100644 --- a/arch/powerpc/dts/p1020rdb-pc.dts +++ b/arch/powerpc/dts/p1020rdb-pc.dts @@ -30,6 +30,21 @@ ranges = <0x01000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x00010000 /* downstream I/O */ 0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p1020-post.dtsi" + +&espi0 { + status = "okay"; + flash at 0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <10000000>; /* input clock */ + }; +}; diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts index c0e5ef4cf4..5a20e60d96 100644 --- a/arch/powerpc/dts/p1020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts @@ -30,6 +30,21 @@ ranges = <0x01000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000 /* downstream I/O */ 0x02000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p1020-post.dtsi" + +&espi0 { + status = "okay"; + flash at 0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <10000000>; /* input clock */ + }; +}; diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts index 21174a09be..6e319f0ef0 100644 --- a/arch/powerpc/dts/p1020rdb-pd.dts +++ b/arch/powerpc/dts/p1020rdb-pd.dts @@ -30,6 +30,21 @@ ranges = <0x01000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x00010000 /* downstream I/O */ 0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p1020-post.dtsi" + +&espi0 { + status = "okay"; + flash at 0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <10000000>; /* input clock */ + }; +};