From patchwork Mon May 25 20:15:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 246519 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Mon, 25 May 2020 14:15:57 -0600 Subject: [PATCH 1/4] x86: coral: Correct some FSP-M settings Message-ID: <20200525141554.1.Id58c8292b7bc9a9dc55c21e4f5ad6a1a8000dc99@changeid> Some settings were modified slightly in the device-tree conversion. Return these to their original values. Signed-off-by: Simon Glass Acked-by: Bin Meng --- arch/x86/dts/chromebook_coral.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index aad12f2c4d..5ee056fc95 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -517,6 +517,11 @@ 20 23 22 21 18 19 16 17 /* DQB[7:15] pins of LPDDR4 module with offset of 16 */ 25 28 30 31 26 27 24 29>; + + fspm,dimm0-spd-address = <0>; + fspm,dimm1-spd-address = <0>; + fspm,skip-cse-rbp = <1>; + fspm,enable-s3-heci2 = <0>; }; &fsp_s {