From patchwork Sun May 24 21:43:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Kettenis X-Patchwork-Id: 246389 List-Id: U-Boot discussion From: kettenis at openbsd.org (Mark Kettenis) Date: Sun, 24 May 2020 23:43:29 +0200 Subject: [PATCH 1/2] rockchip: Enable PCIe/M.2 and NVMe on Firefly RK3399 Message-ID: <20200524214330.7751-1-kettenis@openbsd.org> Signed-off-by: Mark Kettenis Reviewed-by: Simon Glass --- configs/firefly-rk3399_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 831a37d607..2f2a3edb72 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -38,10 +39,13 @@ CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=115200 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y