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[21/22] x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU

Message ID 20200521202309.21.I199f5031b9836f1ee1f787dd683739a6904eb54e@changeid
State Accepted
Commit f91f5ab6f0fe2c33b2dd9aa078a87c09eb792a4c
Headers show
Series x86: Enhance MTRR functionality to support multiple CPUs | expand

Commit Message

Simon Glass May 22, 2020, 2:23 a.m. UTC
Add a -c option to mtrr to allow any CPU to be updated with this command.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 cmd/x86/mtrr.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)
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Patch

diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index fea7a437db8..8365a7978ff 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -104,6 +104,17 @@  static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
 	int ret;
 
 	cpu_select = MP_SELECT_BSP;
+	if (argc >= 3 && !strcmp("-c", argv[1])) {
+		const char *cpustr;
+
+		cpustr = argv[2];
+		if (*cpustr == 'a')
+			cpu_select = MP_SELECT_ALL;
+		else
+			cpu_select = simple_strtol(cpustr, NULL, 16);
+		argc -= 2;
+		argv += 2;
+	}
 	argc--;
 	argv++;
 	cmd = argv[0] ? *argv[0] : 0;
@@ -145,11 +156,14 @@  static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
 }
 
 U_BOOT_CMD(
-	mtrr,	6,	1,	do_mtrr,
+	mtrr,	8,	1,	do_mtrr,
 	"Use x86 memory type range registers (32-bit only)",
 	"[list]        - list current registers\n"
 	"set <reg> <type> <start> <size>   - set a register\n"
 	"\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
 	"disable <reg>      - disable a register\n"
-	"enable <reg>       - enable a register"
+	"enable <reg>       - enable a register\n"
+	"\n"
+	"Precede command with '-c <n>|all' to access a particular CPU, e.g.\n"
+	"   mtrr -c all list; mtrr -c 2e list"
 );