[v12,13/21] riscv: Clear pending interrupts before enabling IPIs

On some platforms (k210), the previous stage bootloader may have not
cleared pending IPIs before transferring control to U-Boot. This can cause
race conditions, as multiple harts all attempt to initialize the IPI
controller at once. This patch clears IPIs before enabling them, ensuring
that only one hart modifies shared memory at once.

Signed-off-by: Sean Anderson <seanga2 at gmail.com>
Reviewed-by: Rick Chen <rick at andestech.com>
---

Changes in v7:
- Split of into its own patch

 arch/riscv/cpu/start.S | 2 ++
 1 file changed, 2 insertions(+)

Message ID	20200520191738.337845-14-seanga2@gmail.com
State	Superseded
Headers	show List-Id: U-Boot discussion <u-boot.lists.denx.de> From: seanga2 at gmail.com (Sean Anderson) Date: Wed, 20 May 2020 15:17:30 -0400 Subject: [PATCH v12 13/21] riscv: Clear pending interrupts before enabling IPIs In-Reply-To: <20200520191738.337845-1-seanga2@gmail.com> References: <20200520191738.337845-1-seanga2@gmail.com> Message-ID: <20200520191738.337845-14-seanga2@gmail.com>
Series	riscv: Add Sipeed Maix support \| expand [v12,00/21] riscv: Add Sipeed Maix support [v12,01/21] clk: Always use the supplied struct clk [v12,02/21] clk: Check that ops of composite clock components exist before calling [v12,03/21] clk: Unconditionally recursively en-/dis-able clocks [v12,04/21] clk: Fix clk_get_by_* handling of index [v12,05/21] clk: Add K210 pll support [v12,06/21] clk: Add a bypass clock for K210 [v12,07/21] clk: Add K210 clock support [v12,08/21] dm: Add support for simple-pm-bus [v12,09/21] dm: Fix error handling for dev_read_addr_ptr [v12,10/21] reset: Add generic reset driver [v12,11/21] lib: Always set errno in hcreate_r [v12,12/21] riscv: Add headers for asm/global_data.h [v12,13/21] riscv: Clear pending interrupts before enabling IPIs [v12,14/21] riscv: Clean up IPI initialization code [v12,15/21] riscv: Add option to support RISC-V privileged spec 1.9 [v12,16/21] riscv: Allow use of reset drivers [v12,17/21] riscv: Try to get cpu frequency from a "clocks" node if it exists [v12,18/21] riscv: Enable cpu clock if it is present [v12,19/21] riscv: Add device tree for K210 and Sipeed Maix BitM [v12,20/21] doc: riscv: Add documentation for Sipeed Maix Bit [v12,21/21] riscv: Add Sipeed Maix support

[v12,13/21] riscv: Clear pending interrupts before enabling IPIs

Commit Message

Patch