From patchwork Mon May 18 13:17:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 245954 List-Id: U-Boot discussion From: m.szyprowski at samsung.com (Marek Szyprowski) Date: Mon, 18 May 2020 15:17:59 +0200 Subject: [RFC PATCH v3 1/3] arm: provide a function for boards init code to modify MMU virtual-physical map In-Reply-To: <20200518131801.465-1-m.szyprowski@samsung.com> References: <20200518131801.465-1-m.szyprowski@samsung.com> Message-ID: <20200518131801.465-2-m.szyprowski@samsung.com> Provide a function for setting arbitrary virtual-physical MMU mapping for the given region. Signed-off-by: Marek Szyprowski --- arch/arm/include/asm/mmu.h | 8 ++++++++ arch/arm/include/asm/system.h | 11 +++++++++++ arch/arm/lib/cache-cp15.c | 24 ++++++++++++++++++------ 3 files changed, 37 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/mmu.h diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h new file mode 100644 index 0000000..fe3d793 --- /dev/null +++ b/arch/arm/include/asm/mmu.h @@ -0,0 +1,8 @@ +#ifndef __ASM_ARM_MMU_H +#define __ASM_ARM_MMU_H + +#ifdef CONFIG_ADDR_MAP +extern void init_addr_map(void); +#endif + +#endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 81ccead..5b9f31c 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -573,6 +573,17 @@ s32 psci_features(u32 function_id, u32 psci_fid); void save_boot_params_ret(void); /** + * Change the virt/phys mapping and cache settings for a region. + * + * \param virt virtual start address of memory region to change + * \param phys physical address for the memory region to set + * \param size size of memory region to change + * \param option dcache option to select + */ +void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys, + size_t size, enum dcache_option option); + +/** * Change the cache settings for a region. * * \param start start address of memory region to change diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index f8d2096..84ddad3 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -24,7 +24,8 @@ __weak void arm_init_domains(void) { } -void set_section_dcache(int section, enum dcache_option option) +static void set_section_phys(int section, phys_addr_t phys, + enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -36,7 +37,7 @@ void set_section_dcache(int section, enum dcache_option option) #endif /* Add the page offset */ - value |= ((u32)section << MMU_SECTION_SHIFT); + value |= phys; /* Add caching bits */ value |= option; @@ -45,13 +46,18 @@ void set_section_dcache(int section, enum dcache_option option) page_table[section] = value; } +void set_section_dcache(int section, enum dcache_option option) +{ + set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option); +} + __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) { debug("%s: Warning: not implemented\n", __func__); } -void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, - enum dcache_option option) +void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, + size_t size, enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -70,8 +76,8 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size, option); #endif - for (upto = start; upto < end; upto++) - set_section_dcache(upto, option); + for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE) + set_section_phys(upto, phys, option); /* * Make sure range is cache line aligned @@ -86,6 +92,12 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, mmu_page_table_flush(startpt, stoppt); } +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ + mmu_set_region_dcache_behaviour_phys(start, start, size, option); +} + __weak void dram_bank_mmu_setup(int bank) { bd_t *bd = gd->bd;