From patchwork Wed Apr 29 02:21:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 238818 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Tue, 28 Apr 2020 20:21:54 -0600 Subject: [PATCH v1 30/35] x86: Allow devices to write an SSDT In-Reply-To: <20200429022159.254271-1-sjg@chromium.org> References: <20200429022159.254271-1-sjg@chromium.org> Message-ID: <20200428202137.v1.30.Id6fc7367886ec2e2d9f2ddf423ad32720e14e5e5@changeid> Call the new core function to write the SSDT. This is made up of fragments generated by devices that have the fill_ssdt() method. Signed-off-by: Simon Glass --- Changes in v1: - Use OEM_TABLE_ID instead of ACPI_TABLE_CREATOR - Update ACPI_DSTATUS enum arch/x86/lib/acpi_table.c | 50 +++++++++++++++++++++++++++++++++++++++ include/acpi/acpi_table.h | 6 +++++ 2 files changed, 56 insertions(+) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 676370107f..0af9d47050 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -353,6 +354,46 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) header->checksum = table_compute_checksum((void *)spcr, header->length); } +static void acpi_ssdt_write_cbtable(struct acpi_ctx *ctx) +{ + uintptr_t base; + u32 size; + + base = 0; + size = 0; + + acpigen_write_device(ctx, "CTBL"); + acpigen_write_coreboot_hid(ctx, COREBOOT_ACPI_ID_CBTABLE); + acpigen_write_name_integer(ctx, "_UID", 0); + acpigen_write_sta(ctx, ACPI_DSTATUS_HIDDEN_ON); + acpigen_write_name(ctx, "_CRS"); + acpigen_write_resourcetemplate_header(ctx); + acpigen_write_mem32fixed(ctx, 0, base, size); + acpigen_write_resourcetemplate_footer(ctx); + acpigen_pop_len(ctx); +} + +void acpi_create_ssdt(struct acpi_ctx *ctx, struct acpi_table_header *ssdt, + const char *oem_table_id) +{ + memset((void *)ssdt, '\0', sizeof(struct acpi_table_header)); + + acpi_fill_header(ssdt, "SSDT"); + ssdt->revision = acpi_get_table_revision(ACPITAB_SSDT); + ssdt->aslc_revision = 1; + ssdt->length = sizeof(struct acpi_table_header); + + acpi_inc(ctx, sizeof(struct acpi_table_header)); + + /* Write object to declare coreboot tables */ + acpi_ssdt_write_cbtable(ctx); + acpi_fill_ssdt(ctx); + + /* (Re)calculate length and checksum. */ + ssdt->length = ctx->current - (void *)ssdt; + ssdt->checksum = table_compute_checksum((void *)ssdt, ssdt->length); +} + /* * QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c */ @@ -362,6 +403,7 @@ ulong write_acpi_tables(ulong start_addr) struct acpi_facs *facs; struct acpi_table_header *dsdt; struct acpi_fadt *fadt; + struct acpi_table_header *ssdt; struct acpi_mcfg *mcfg; struct acpi_madt *madt; struct acpi_csrt *csrt; @@ -417,6 +459,14 @@ ulong write_acpi_tables(ulong start_addr) acpi_create_fadt(fadt, facs, dsdt); acpi_add_table(ctx, fadt); + debug("ACPI: * SSDT\n"); + ssdt = (struct acpi_table_header *)ctx->current; + acpi_create_ssdt(ctx, ssdt, OEM_TABLE_ID); + if (ssdt->length > sizeof(struct acpi_table_header)) { + acpi_inc_align(ctx, ssdt->length); + acpi_add_table(ctx, ssdt); + } + debug("ACPI: * MCFG\n"); mcfg = ctx->current; acpi_create_mcfg(mcfg); diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index 3681c5c8ed..110b66345f 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -25,6 +25,12 @@ struct acpi_ctx; +/* List of ACPI HID that use the coreboot ACPI ID */ +enum coreboot_acpi_ids { + COREBOOT_ACPI_ID_CBTABLE = 0x0000, /* BOOT0000 */ + COREBOOT_ACPI_ID_MAX = 0xFFFF, /* BOOTFFFF */ +}; + /* * RSDP (Root System Description Pointer) * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum