| Message ID | 20200428062747.8349-3-frank.wang@rock-chips.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add Rockchip RK3399 USB3.0 Host support | expand |
Hi Frank, On 2020/4/28 ??2:27, Frank Wang wrote: > Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, > which specifies whether the USB2.0 PHY provides a free-running > PHY clock, which is active when the clock control input is active. > > Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk") > in Linux Rockchip Kernel. > > Signed-off-by: Frank Wang <frank.wang at rock-chips.com> Reviewed-by: Kever Yang <kever.yang at rock-chips.com> Thanks, - Kever > --- > drivers/usb/dwc3/core.c | 6 ++++++ > drivers/usb/dwc3/core.h | 2 ++ > include/dwc3-uboot.h | 1 + > 3 files changed, 9 insertions(+) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index a80e7d54aa..3c81a07dad 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -398,6 +398,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc) > if (dwc->dis_enblslpm_quirk) > reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; > > + if (dwc->dis_u2_freeclk_exists_quirk) > + reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; > + > dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); > > mdelay(100); > @@ -719,6 +722,7 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) > dwc->dis_u3_susphy_quirk = dwc3_dev->dis_u3_susphy_quirk; > dwc->dis_u2_susphy_quirk = dwc3_dev->dis_u2_susphy_quirk; > dwc->dis_enblslpm_quirk = dwc3_dev->dis_enblslpm_quirk; > + dwc->dis_u2_freeclk_exists_quirk = dwc3_dev->dis_u2_freeclk_exists_quirk; > > dwc->tx_de_emphasis_quirk = dwc3_dev->tx_de_emphasis_quirk; > if (dwc3_dev->tx_de_emphasis) > @@ -981,6 +985,8 @@ void dwc3_of_parse(struct dwc3 *dwc) > "snps,dis_u2_susphy_quirk"); > dwc->dis_enblslpm_quirk = dev_read_bool(dev, > "snps,dis_enblslpm_quirk"); > + dwc->dis_u2_freeclk_exists_quirk = dev_read_bool(dev, > + "snps,dis-u2-freeclk-exists-quirk"); > dwc->tx_de_emphasis_quirk = dev_read_bool(dev, > "snps,tx_de_emphasis_quirk"); > tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1); > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > index eabbc30f25..86a697d1bd 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -161,6 +161,7 @@ > > /* Global USB2 PHY Configuration Register */ > #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) > +#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30) > #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) > #define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3) > #define DWC3_GUSB2PHYCFG_PHYIF_MASK DWC3_GUSB2PHYCFG_PHYIF(1) > @@ -822,6 +823,7 @@ struct dwc3 { > unsigned dis_u3_susphy_quirk:1; > unsigned dis_u2_susphy_quirk:1; > unsigned dis_enblslpm_quirk:1; > + unsigned dis_u2_freeclk_exists_quirk:1; > > unsigned tx_de_emphasis_quirk:1; > unsigned tx_de_emphasis:2; > diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h > index fd3f173c37..952ad64c35 100644 > --- a/include/dwc3-uboot.h > +++ b/include/dwc3-uboot.h > @@ -33,6 +33,7 @@ struct dwc3_device { > unsigned dis_u3_susphy_quirk; > unsigned dis_u2_susphy_quirk; > unsigned dis_enblslpm_quirk; > + unsigned dis_u2_freeclk_exists_quirk; > unsigned tx_de_emphasis_quirk; > unsigned tx_de_emphasis; > int index;
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index a80e7d54aa..3c81a07dad 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -398,6 +398,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_enblslpm_quirk) reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; + if (dwc->dis_u2_freeclk_exists_quirk) + reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); mdelay(100); @@ -719,6 +722,7 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) dwc->dis_u3_susphy_quirk = dwc3_dev->dis_u3_susphy_quirk; dwc->dis_u2_susphy_quirk = dwc3_dev->dis_u2_susphy_quirk; dwc->dis_enblslpm_quirk = dwc3_dev->dis_enblslpm_quirk; + dwc->dis_u2_freeclk_exists_quirk = dwc3_dev->dis_u2_freeclk_exists_quirk; dwc->tx_de_emphasis_quirk = dwc3_dev->tx_de_emphasis_quirk; if (dwc3_dev->tx_de_emphasis) @@ -981,6 +985,8 @@ void dwc3_of_parse(struct dwc3 *dwc) "snps,dis_u2_susphy_quirk"); dwc->dis_enblslpm_quirk = dev_read_bool(dev, "snps,dis_enblslpm_quirk"); + dwc->dis_u2_freeclk_exists_quirk = dev_read_bool(dev, + "snps,dis-u2-freeclk-exists-quirk"); dwc->tx_de_emphasis_quirk = dev_read_bool(dev, "snps,tx_de_emphasis_quirk"); tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index eabbc30f25..86a697d1bd 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -161,6 +161,7 @@ /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) #define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3) #define DWC3_GUSB2PHYCFG_PHYIF_MASK DWC3_GUSB2PHYCFG_PHYIF(1) @@ -822,6 +823,7 @@ struct dwc3 { unsigned dis_u3_susphy_quirk:1; unsigned dis_u2_susphy_quirk:1; unsigned dis_enblslpm_quirk:1; + unsigned dis_u2_freeclk_exists_quirk:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index fd3f173c37..952ad64c35 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -33,6 +33,7 @@ struct dwc3_device { unsigned dis_u3_susphy_quirk; unsigned dis_u2_susphy_quirk; unsigned dis_enblslpm_quirk; + unsigned dis_u2_freeclk_exists_quirk; unsigned tx_de_emphasis_quirk; unsigned tx_de_emphasis; int index;
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, which specifies whether the USB2.0 PHY provides a free-running PHY clock, which is active when the clock control input is active. Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk") in Linux Rockchip Kernel. Signed-off-by: Frank Wang <frank.wang at rock-chips.com> --- drivers/usb/dwc3/core.c | 6 ++++++ drivers/usb/dwc3/core.h | 2 ++ include/dwc3-uboot.h | 1 + 3 files changed, 9 insertions(+)