From patchwork Sun Apr 26 23:43:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Giulio Benetti X-Patchwork-Id: 238556 List-Id: U-Boot discussion From: giulio.benetti at benettiengineering.com (Giulio Benetti) Date: Mon, 27 Apr 2020 01:43:01 +0200 Subject: [PATCH 4/4] clk: imx: clk-imxrt1050: fix lcdif clock gate In-Reply-To: <20200426234301.111433-1-giulio.benetti@benettiengineering.com> References: <20200426234301.111433-1-giulio.benetti@benettiengineering.com> Message-ID: <20200426234301.111433-5-giulio.benetti@benettiengineering.com> LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti --- drivers/clk/imx/clk-imxrt1050.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c index 329f4580c5..8279e784fe 100644 --- a/drivers/clk/imx/clk-imxrt1050.c +++ b/drivers/clk/imx/clk-imxrt1050.c @@ -255,7 +255,7 @@ static int imxrt1050_clk_probe(struct udevice *dev) clk_dm(IMXRT1050_CLK_SEMC, imx_clk_gate2("semc", "semc_podf", base + 0x74, 4)); clk_dm(IMXRT1050_CLK_LCDIF, - imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28)); + imx_clk_gate2("lcdif", "lcdif_podf", base + 0x74, 10)); struct clk *clk, *clk1;