From patchwork Thu Apr 23 02:33:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 238369 List-Id: U-Boot discussion From: seanga2 at gmail.com (Sean Anderson) Date: Wed, 22 Apr 2020 22:33:17 -0400 Subject: [PATCH v9 18/21] riscv: Enable cpu clock if it is present In-Reply-To: <20200423023320.1380090-1-seanga2@gmail.com> References: <20200423023320.1380090-1-seanga2@gmail.com> Message-ID: <20200423023320.1380090-19-seanga2@gmail.com> The cpu clock is probably already enabled if we are executing code (though we could be executing from a different core). This patch prevents the cpu clock or its parents from being disabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted on its own as https://patchwork.ozlabs.org/patch/1232420/ Changes in v4: - New drivers/cpu/riscv_cpu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c index c6ed060abc..9ce58695aa 100644 --- a/drivers/cpu/riscv_cpu.c +++ b/drivers/cpu/riscv_cpu.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2018, Bin Meng + * Copyright (C) 2020, Sean Anderson */ #include @@ -117,6 +118,24 @@ static int riscv_cpu_bind(struct udevice *dev) return 0; } +static int riscv_cpu_probe(struct udevice *dev) +{ + int ret = 0; + struct clk clk; + + /* Get a clock if it exists */ + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return 0; + + ret = clk_enable(&clk); + clk_free(&clk); + if (ret == -ENOSYS || ret == -ENOTSUPP) + return 0; + else + return ret; +} + static const struct cpu_ops riscv_cpu_ops = { .get_desc = riscv_cpu_get_desc, .get_info = riscv_cpu_get_info, @@ -133,6 +152,7 @@ U_BOOT_DRIVER(riscv_cpu) = { .id = UCLASS_CPU, .of_match = riscv_cpu_ids, .bind = riscv_cpu_bind, + .probe = riscv_cpu_probe, .ops = &riscv_cpu_ops, .flags = DM_FLAG_PRE_RELOC, };