From patchwork Tue Apr 21 07:28:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 238163 List-Id: U-Boot discussion From: sr at denx.de (Stefan Roese) Date: Tue, 21 Apr 2020 09:28:26 +0200 Subject: [PATCH 02/26 v7] mips: mtmips: add predefined i-cache/d-cache size and linesize In-Reply-To: <20200421072850.4970-1-sr@denx.de> References: <20200421072850.4970-1-sr@denx.de> Message-ID: <20200421072850.4970-3-sr@denx.de> From: Weijie Gao Both mt7620 and mt7628 has the same cache configuration. There is no need to use CONFIG_SYS_CACHE_SIZE_AUTO to probe it at runtime. Add them into Kconfig to reduce some code size. Reviewed-by: Stefan Roese Signed-off-by: Weijie Gao --- Changes since v3: none arch/mips/mach-mtmips/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index c8dcf19c0d..8e10719b27 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -7,6 +7,18 @@ config SYS_MALLOC_F_LEN config SYS_SOC default "mt7628" if SOC_MT7628 +config SYS_DCACHE_SIZE + default 32768 + +config SYS_DCACHE_LINE_SIZE + default 32 + +config SYS_ICACHE_SIZE + default 65536 + +config SYS_ICACHE_LINE_SIZE + default 32 + choice prompt "MediaTek MIPS SoC select"