From patchwork Mon Apr 20 12:09:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 238089 List-Id: U-Boot discussion From: jagan at amarulasolutions.com (Jagan Teki) Date: Mon, 20 Apr 2020 17:39:21 +0530 Subject: [PATCH 3/3] spi: sifive: Fix format register proto field In-Reply-To: <20200420120921.12840-1-jagan@amarulasolutions.com> References: <20200420120921.12840-1-jagan@amarulasolutions.com> Message-ID: <20200420120921.12840-4-jagan@amarulasolutions.com> SiFive SPI controller has a proto bit field in frame format register which would be used to configure the SPI I/O protocol lines used on specific transfer.? Right now the driver is configuring this proto using slave->mode which is used for data transfer and opcode, address vary depending on the particular transfer at runtime. Now the SPI framework supports per transfer I/O protocol lines, so use spi->proto instead of slave-mode. Signed-off-by: Jagan Teki --- drivers/spi/spi-sifive.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c index 8f5efb51a3..336b683476 100644 --- a/drivers/spi/spi-sifive.c +++ b/drivers/spi/spi-sifive.c @@ -146,12 +146,17 @@ static void sifive_spi_prep_transfer(struct sifive_spi *spi, /* Number of wires ? */ cr &= ~SIFIVE_SPI_FMT_PROTO_MASK; - if ((slave_plat->mode & SPI_TX_QUAD) || (slave_plat->mode & SPI_RX_QUAD)) + switch (slave_plat->proto) { + case SPI_PROTO_QUAD: cr |= SIFIVE_SPI_FMT_PROTO_QUAD; - else if ((slave_plat->mode & SPI_TX_DUAL) || (slave_plat->mode & SPI_RX_DUAL)) + break; + case SPI_PROTO_DUAL: cr |= SIFIVE_SPI_FMT_PROTO_DUAL; - else + break; + default: cr |= SIFIVE_SPI_FMT_PROTO_SINGLE; + break; + } /* SPI direction in/out ? */ cr &= ~SIFIVE_SPI_FMT_DIR;