@@ -337,6 +337,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
return -EIO;
#else
u8 opcode = op->cmd.opcode;
+ slave->proto = op->cmd.buswidth;
flag = SPI_XFER_BEGIN;
if (!op->addr.nbytes && !op->dummy.nbytes && !op->data.nbytes)
@@ -378,6 +379,8 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
if (!op->data.nbytes)
flag |= SPI_XFER_END;
+ slave->proto = op->addr.buswidth;
+
ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
if (ret < 0) {
dev_err(slave->dev, "failed to xfer addr + dummy\n");
@@ -392,6 +395,8 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
else
tx_buf = op->data.buf.out;
+ slave->proto = op->data.buswidth;
+
ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf, rx_buf,
SPI_XFER_END);
if (ret) {
@@ -86,12 +86,19 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
{
struct udevice *bus = dev->parent;
struct dm_spi_ops *ops = spi_get_ops(bus);
+ struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
+ struct spi_slave *slave = dev_get_parent_priv(dev);
if (bus->uclass->uc_drv->id != UCLASS_SPI)
return -EOPNOTSUPP;
if (!ops->xfer)
return -ENOSYS;
+ if (!slave->proto)
+ plat->proto = SPI_PROTO_SINGLE;
+ else
+ plat->proto = slave->proto;
+
return ops->xfer(dev, bitlen, dout, din, flags);
}
@@ -57,11 +57,14 @@ struct dm_spi_bus {
* @cs: Chip select number (0..n-1)
* @max_hz: Maximum bus speed that this slave can tolerate
* @mode: SPI mode to use for this device (see SPI mode flags)
+ * @proto: Number of IO protocol lines used for writing or reading.
+ * If 0 then the default SPI_PROTO_SINGLE is used.
*/
struct dm_spi_slave_platdata {
unsigned int cs;
uint max_hz;
uint mode;
+ uint proto;
};
#endif /* CONFIG_DM_SPI */
@@ -116,6 +119,8 @@ enum spi_polarity {
* @max_hz: Maximum speed for this slave
* @speed: Current bus speed. This is 0 until the bus is first
* claimed.
+ * @proto: Number of IO protocol lines used for writing or reading.
+ * If 0 then the default SPI_PROTO_SINGLE is used.
* @bus: ID of the bus that the slave is attached to. For
* driver model this is the sequence number of the SPI
* bus (bus->seq) so does not need to be stored
@@ -134,6 +139,10 @@ struct spi_slave {
struct udevice *dev; /* struct spi_slave is dev->parentdata */
uint max_hz;
uint speed;
+ uint proto;
+#define SPI_PROTO_QUAD 4 /* 4 lines I/O protocol transfer */
+#define SPI_PROTO_DUAL 2 /* 2 lines I/O protocol transfer */
+#define SPI_PROTO_SINGLE 1 /* 1 line I/O protocol transfer */
#else
unsigned int bus;
unsigned int cs;
Some of the SPI controllers have a special set of format registers that defines how the transfer is initiated to the FIFO by means of I/O protocol lines. Each mode of transfer from slave would be required to configure the I/O protocol lines so-that the master would identify how many number I/O protocol lines were used and alter the protocol bits on the controller. So, add the I/O protocol lines support via proto. Slave would fill the number I/O protocol lines in proto then the master would alter the protocol bits on SPI controller based on the proto number. Slave would fill the number I/O protocol lines in the proto then the master would alter the protocol bits on the SPI controller based on the proto number. This would happen for each transfer alone instead combined transfers since each transfer has its own set of I/O protocol lines. Signed-off-by: Jagan Teki <jagan at amarulasolutions.com> --- drivers/spi/spi-mem.c | 5 +++++ drivers/spi/spi-uclass.c | 7 +++++++ include/spi.h | 9 +++++++++ 3 files changed, 21 insertions(+)