From patchwork Thu Apr 9 13:21:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Krummsdorf X-Patchwork-Id: 237506 List-Id: U-Boot discussion From: michael.krummsdorf at ew.tq-group.com (Michael Krummsdorf) Date: Thu, 9 Apr 2020 15:21:42 +0200 Subject: [PATCH 7/7] board: tqc: tqma6_mba6: switch to device model In-Reply-To: <20200409132142.26491-1-michael.krummsdorf@ew.tq-group.com> References: <20200409132142.26491-1-michael.krummsdorf@ew.tq-group.com> Message-ID: <20200409132142.26491-8-michael.krummsdorf@ew.tq-group.com> Ethernet, usdhc2 and i2c1 interfaces are probed by dm drivers. Therefor init functions in board file are not necessary. Signed-off-by: Michael Krummsdorf --- board/tqc/tqma6/tqma6_mba6.c | 171 +---------------------------------- 1 file changed, 5 insertions(+), 166 deletions(-) diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index 154ea0e925..a5b7587737 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -68,13 +68,6 @@ #endif -#define ENET_RX_PAD_CTRL (PAD_CTL_DSE_34ohm) -#define ENET_TX_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_34ohm) -#define ENET_CLK_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_34ohm) -#define ENET_MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_60ohm) - /* disable on die termination for RGMII */ #define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE 0x00000000 /* optimised drive strength for 1.0 .. 1.3 V signal on RGMII */ @@ -82,34 +75,6 @@ /* optimised drive strength for 1.3 .. 2.5 V signal on RGMII */ #define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V 0x000C0000 -#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(1, 25) - -static iomux_v3_cfg_t const mba6_enet_pads[] = { - NEW_PAD_CTRL(MX6_PAD_ENET_MDIO__ENET_MDIO, ENET_MDIO_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_ENET_MDC__ENET_MDC, ENET_MDIO_PAD_CTRL), - - NEW_PAD_CTRL(MX6_PAD_RGMII_TXC__RGMII_TXC, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD0__RGMII_TD0, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD1__RGMII_TD1, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD2__RGMII_TD2, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD3__RGMII_TD3, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL, - ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_ENET_REF_CLK__ENET_TX_CLK, ENET_CLK_PAD_CTRL), - /* - * these pins are also used for config strapping by phy - */ - NEW_PAD_CTRL(MX6_PAD_RGMII_RD0__RGMII_RD0, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RD1__RGMII_RD1, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RD2__RGMII_RD2, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RD3__RGMII_RD3, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RXC__RGMII_RXC, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL, - ENET_RX_PAD_CTRL), - /* KSZ9031 PHY Reset */ - NEW_PAD_CTRL(MX6_PAD_ENET_CRS_DV__GPIO1_IO25, GPIO_OUT_PAD_CTRL), -}; - static void mba6_setup_iomuxc_enet(void) { struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; @@ -121,22 +86,6 @@ static void mba6_setup_iomuxc_enet(void) (void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM); __raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V, (void *)IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII); - - imx_iomux_v3_setup_multiple_pads(mba6_enet_pads, - ARRAY_SIZE(mba6_enet_pads)); - - /* Reset PHY */ - gpio_direction_output(ENET_PHY_RESET_GPIO , 0); - /* Need delay 10ms after power on according to KSZ9031 spec */ - mdelay(10); - gpio_set_value(ENET_PHY_RESET_GPIO, 1); - /* - * KSZ9031 manual: 100 usec wait time after reset before communication - * over MDIO - * BUGBUG: hardware has an RC const that needs > 10 msec from 0->1 on - * reset before the phy sees a high level - */ - mdelay(15); } static iomux_v3_cfg_t const mba6_uart2_pads[] = { @@ -150,91 +99,14 @@ static void mba6_setup_iomuxc_uart(void) ARRAY_SIZE(mba6_uart2_pads)); } -#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -#define USDHC2_WP_GPIO IMX_GPIO_NR(1, 2) - -int tqma6_bb_board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - if (cfg->esdhc_base == USDHC2_BASE_ADDR) - ret = !gpio_get_value(USDHC2_CD_GPIO); - - return ret; -} - -int tqma6_bb_board_mmc_getwp(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - if (cfg->esdhc_base == USDHC2_BASE_ADDR) - ret = gpio_get_value(USDHC2_WP_GPIO); - - return ret; -} - -static struct fsl_esdhc_cfg mba6_usdhc_cfg = { - .esdhc_base = USDHC2_BASE_ADDR, - .max_bus_width = 4, -}; - -static iomux_v3_cfg_t const mba6_usdhc2_pads[] = { - NEW_PAD_CTRL(MX6_PAD_SD2_CLK__SD2_CLK, USDHC_CLK_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_CMD__SD2_CMD, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL), - /* CD */ - NEW_PAD_CTRL(MX6_PAD_GPIO_4__GPIO1_IO04, GPIO_IN_PAD_CTRL), - /* WP */ - NEW_PAD_CTRL(MX6_PAD_GPIO_2__GPIO1_IO02, GPIO_IN_PAD_CTRL), -}; - -int tqma6_bb_board_mmc_init(bd_t *bis) -{ - imx_iomux_v3_setup_multiple_pads(mba6_usdhc2_pads, - ARRAY_SIZE(mba6_usdhc2_pads)); - gpio_direction_input(USDHC2_CD_GPIO); - gpio_direction_input(USDHC2_WP_GPIO); - - mba6_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - if (fsl_esdhc_initialize(bis, &mba6_usdhc_cfg)) - puts("Warning: failed to initialize SD\n"); - - return 0; -} - -static struct i2c_pads_info mba6_i2c1_pads = { -/* I2C1: MBa6x */ - .scl = { - .i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__I2C1_SCL, - I2C_PAD_CTRL), - .gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__GPIO5_IO27, - I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 27) - }, - .sda = { - .i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__I2C1_SDA, - I2C_PAD_CTRL), - .gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__GPIO5_IO26, - I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 26) - } -}; - -static void mba6_setup_i2c(void) +int board_mmc_get_env_dev(int devno) { - int ret; /* - * use logical index for bus, e.g. I2C1 -> 0 - * warn on error + * This assumes that the baseboard registered + * the boot device first ... + * Note: SDHC3 == idx2 */ - ret = setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mba6_i2c1_pads); - if (ret) - printf("setup I2C1 failed: %d\n", ret); + return (2 == devno) ? 0 : 1; } int board_phy_config(struct phy_device *phydev) @@ -284,37 +156,6 @@ int board_phy_config(struct phy_device *phydev) return 0; } -int board_eth_init(bd_t *bis) -{ - uint32_t base = IMX_FEC_BASE; - struct mii_dev *bus = NULL; - struct phy_device *phydev = NULL; - int ret; - - bus = fec_get_miibus(base, -1); - if (!bus) - return -EINVAL; - /* scan phy */ - phydev = phy_find_by_mask(bus, (0xf << CONFIG_FEC_MXC_PHYADDR), - PHY_INTERFACE_MODE_RGMII); - - if (!phydev) { - ret = -EINVAL; - goto free_bus; - } - ret = fec_probe(bis, -1, base, bus, phydev); - if (ret) - goto free_phydev; - - return 0; - -free_phydev: - free(phydev); -free_bus: - free(bus); - return ret; -} - int tqma6_bb_board_early_init_f(void) { mba6_setup_iomuxc_uart(); @@ -324,8 +165,6 @@ int tqma6_bb_board_early_init_f(void) int tqma6_bb_board_init(void) { - mba6_setup_i2c(); - /* do it here - to have reset completed */ mba6_setup_iomuxc_enet(); return 0;