From patchwork Wed Apr 8 08:09:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 237366 List-Id: U-Boot discussion From: sr at denx.de (Stefan Roese) Date: Wed, 8 Apr 2020 10:09:21 +0200 Subject: [PATCH 05/26 v6] sysreset: add reset controller based reboot driver In-Reply-To: <20200408080942.7694-1-sr@denx.de> References: <20200408080942.7694-1-sr@denx.de> Message-ID: <20200408080942.7694-6-sr@denx.de> From: Weijie Gao Some chips provide their sysreset function in reset controller, which is normally a bit written to 1 to perform the sysreset. This patch adds a new sysreset driver to take advantage of it. Reviewed-by: Daniel Schwierzeck Reviewed-by: Simon Glass Signed-off-by: Weijie Gao --- Changes since v3: none drivers/sysreset/Kconfig | 6 ++++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_resetctl.c | 48 ++++++++++++++++++++++++++++ 3 files changed, 55 insertions(+) create mode 100644 drivers/sysreset/sysreset_resetctl.c diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index f09e138bb8..4be7433404 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -101,6 +101,12 @@ config SYSRESET_WATCHDOG help Reboot support for generic watchdog reset. +config SYSRESET_RESETCTL + bool "Enable support for reset controller reboot driver" + select DM_RESET + help + Reboot support using generic reset controller. + config SYSRESET_X86 bool "Enable support for x86 processor reboot driver" depends on X86 diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 51af68fad3..3ed4bab9e3 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -16,5 +16,6 @@ obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o +obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o diff --git a/drivers/sysreset/sysreset_resetctl.c b/drivers/sysreset/sysreset_resetctl.c new file mode 100644 index 0000000000..b8203ba605 --- /dev/null +++ b/drivers/sysreset/sysreset_resetctl.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao + */ + +#include +#include +#include +#include +#include + +struct resetctl_reboot_priv { + struct reset_ctl_bulk resets; +}; + +static int resetctl_reboot_request(struct udevice *dev, enum sysreset_t type) +{ + struct resetctl_reboot_priv *priv = dev_get_priv(dev); + + return reset_assert_bulk(&priv->resets); +} + +static struct sysreset_ops resetctl_reboot_ops = { + .request = resetctl_reboot_request, +}; + +int resetctl_reboot_probe(struct udevice *dev) +{ + struct resetctl_reboot_priv *priv = dev_get_priv(dev); + + return reset_get_bulk(dev, &priv->resets); +} + +static const struct udevice_id resetctl_reboot_ids[] = { + { .compatible = "resetctl-reboot" }, + { } +}; + +U_BOOT_DRIVER(resetctl_reboot) = { + .id = UCLASS_SYSRESET, + .name = "resetctl_reboot", + .of_match = resetctl_reboot_ids, + .ops = &resetctl_reboot_ops, + .priv_auto_alloc_size = sizeof(struct resetctl_reboot_priv), + .probe = resetctl_reboot_probe, +};