From patchwork Tue Apr 7 07:43:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Tan, Ley Foon" X-Patchwork-Id: 237299 List-Id: U-Boot discussion From: ley.foon.tan at intel.com (Ley Foon Tan) Date: Tue, 7 Apr 2020 15:43:14 +0800 Subject: [PATCH v2 3/3] arm: socfpga: arria10: Enable cache driver in SPL In-Reply-To: <20200407074314.23764-1-ley.foon.tan@intel.com> References: <20200407074314.23764-1-ley.foon.tan@intel.com> Message-ID: <20200407074314.23764-4-ley.foon.tan@intel.com> Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE to enable cache driver in SPL. This fixed error below in SPL: cache controller driver NOT found! Signed-off-by: Ley Foon Tan Reviewed-by: Simon Goldschmidt --- v2: Enable SPL_CACHE in Kconfig instead of defconfig. --- arch/arm/dts/socfpga_arria10-u-boot.dtsi | 4 ++++ arch/arm/mach-socfpga/Kconfig | 1 + 2 files changed, 5 insertions(+) diff --git a/arch/arm/dts/socfpga_arria10-u-boot.dtsi b/arch/arm/dts/socfpga_arria10-u-boot.dtsi index 0db358cf1f2b..6ff1ea6e5eb7 100644 --- a/arch/arm/dts/socfpga_arria10-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10-u-boot.dtsi @@ -73,6 +73,10 @@ reset-names = "i2c"; }; +&L2 { + u-boot,dm-pre-reloc; +}; + &l4_mp_clk { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 38d6c1b2ba32..a3699e82a19e 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -46,6 +46,7 @@ config TARGET_SOCFPGA_ARRIA10 bool select SPL_ALTERA_SDRAM select SPL_BOARD_INIT if SPL + select SPL_CACHE if SPL select CLK select SPL_CLK if SPL select DM_I2C