From patchwork Tue Mar 31 00:48:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 244620 List-Id: U-Boot discussion From: marex at denx.de (Marek Vasut) Date: Tue, 31 Mar 2020 02:48:43 +0200 Subject: [PATCH V2 06/14] ARM: dts: stm32: Add QSPI NOR on AV96 In-Reply-To: <20200331004851.282583-1-marex@denx.de> References: <20200331004851.282583-1-marex@denx.de> Message-ID: <20200331004851.282583-7-marex@denx.de> The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it into the DT. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrice Chotard --- V2: Drop the explicit flash type in DT node, use spi-flash --- arch/arm/dts/stm32mp157a-avenger96.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts index 3fca1ed56d..512ef5f7bb 100644 --- a/arch/arm/dts/stm32mp157a-avenger96.dts +++ b/arch/arm/dts/stm32mp157a-avenger96.dts @@ -20,6 +20,7 @@ mmc0 = &sdmmc1; serial0 = &uart4; serial1 = &uart7; + spi0 = &qspi; }; chosen { @@ -300,6 +301,25 @@ vdd_3v3_usbfs-supply = <&vdd_usb>; }; +&qspi { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; + reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash0: spi-flash at 0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + &rng1 { status = "okay"; };