From patchwork Mon Mar 23 20:15:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 244168 List-Id: U-Boot discussion From: p.yadav at ti.com (Pratyush Yadav) Date: Tue, 24 Mar 2020 01:45:14 +0530 Subject: [PATCH v2 12/16] mtd: spi-nor-core: Use Read SR dummy cycle and address width from SFDP In-Reply-To: <20200323201519.20341-1-p.yadav@ti.com> References: <20200323201519.20341-1-p.yadav@ti.com> Message-ID: <20200323201519.20341-13-p.yadav@ti.com> The xSPI Profile 1.0 table specifies how many dummy cycles and address bytes are needed for the Read Status Register command in octal DTR mode. Use that information to send the correct Read SR command. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi/spi-nor-core.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 85fdd848df..bc5b3a2cbd 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -368,8 +368,16 @@ static int read_sr(struct spi_nor *nor) { int ret; u8 val; + u8 addr_nbytes = nor->rdsr_addr_nbytes; + u8 dummy = nor->rdsr_dummy; + struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 1), + SPI_MEM_OP_ADDR(addr_nbytes, 0, 1), + SPI_MEM_OP_DUMMY(dummy, 1), + SPI_MEM_OP_DATA_IN(1, NULL, 1)); - ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); + spi_nor_setup_op(nor, &op, nor->reg_proto); + + ret = spi_nor_read_write_reg(nor, &op, &val); if (ret < 0) { pr_debug("error %d reading SR\n", (int)ret); return ret;