From patchwork Sun Mar 22 11:12:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaowei Bao X-Patchwork-Id: 244089 List-Id: U-Boot discussion From: xiaowei.bao at nxp.com (Xiaowei Bao) Date: Sun, 22 Mar 2020 19:12:48 +0800 Subject: [PATCH 5/9] pci_ep: layerscape: Add the workaround for errata A-009460 In-Reply-To: <20200322111252.44001-1-xiaowei.bao@nxp.com> References: <20200322111252.44001-1-xiaowei.bao@nxp.com> Message-ID: <20200322111252.44001-5-xiaowei.bao@nxp.com> The VF_BARn_REG register's Prefetchable and Type bit fields are overwritten by a write to VF's BAR Mask register. workaround: Before writing to the VF_BARn_MASK_REG register, write 0b to the PCIE_MISC_CONTROL_1_OFF register. Signed-off-by: Xiaowei Bao --- drivers/pci/pcie_layerscape_ep.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c index bec374b..a2b18ad 100644 --- a/drivers/pci/pcie_layerscape_ep.c +++ b/drivers/pci/pcie_layerscape_ep.c @@ -163,6 +163,15 @@ static void ls_pcie_setup_ep(struct ls_pcie_ep *pcie_ep) if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) { pcie_ep->sriov_flag = 1; for (pf = 0; pf < PCIE_PF_NUM; pf++) { + /* + * The VF_BARn_REG register's Prefetchable and Type bit + * fields are overwritten by a write to VF's BAR Mask + * register. Before writing to the VF_BARn_MASK_REG + * register, write 0b to the PCIE_MISC_CONTROL_1_OFF + * register. + */ + writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF); + if (pcie_ep->cfg2_flag) { for (vf = 0; vf <= PCIE_VF_NUM; vf++) { ctrl_writel(pcie,