From patchwork Thu Mar 19 05:38:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhiqiang Hou X-Patchwork-Id: 243899 List-Id: U-Boot discussion From: Zhiqiang.Hou at nxp.com (Zhiqiang Hou) Date: Thu, 19 Mar 2020 13:38:40 +0800 Subject: [PATCH 06/12] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled In-Reply-To: <20200319053846.2304-1-Zhiqiang.Hou@nxp.com> References: <20200319053846.2304-1-Zhiqiang.Hou@nxp.com> Message-ID: <20200319053846.2304-7-Zhiqiang.Hou@nxp.com> From: Hou Zhiqiang The GIC redistributor tables initialization depends on RESV_RAM config, so select RESV_RAM if GIC_V3_ITS is enabled. Signed-off-by: Hou Zhiqiang --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 275c66d992..af1c148c26 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -46,6 +46,7 @@ config ARCH_LS1028A select SYS_FSL_ERRATUM_A009663 if !TFABOOT select SYS_FSL_ERRATUM_A009942 if !TFABOOT select SYS_FSL_ERRATUM_A050382 + select RESV_RAM if GIC_V3_ITS imply PANIC_HANG config ARCH_LS1043A @@ -152,6 +153,7 @@ config ARCH_LS1088A select SYS_I2C_MXC_I2C2 if !TFABOOT select SYS_I2C_MXC_I2C3 if !TFABOOT select SYS_I2C_MXC_I2C4 if !TFABOOT + select RESV_RAM if GIC_V3_ITS imply SCSI imply PANIC_HANG @@ -202,6 +204,7 @@ config ARCH_LS2080A select SYS_I2C_MXC_I2C2 if !TFABOOT select SYS_I2C_MXC_I2C3 if !TFABOOT select SYS_I2C_MXC_I2C4 if !TFABOOT + select RESV_RAM if GIC_V3_ITS imply DISTRO_DEFAULTS imply PANIC_HANG @@ -229,6 +232,7 @@ config ARCH_LX2160A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC + select RESV_RAM if GIC_V3_ITS imply DISTRO_DEFAULTS imply PANIC_HANG imply SCSI