From patchwork Thu Mar 19 05:38:43 2020
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X-Patchwork-Submitter: Zhiqiang Hou <zhiqiang.hou@nxp.com>
X-Patchwork-Id: 243902
List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: Zhiqiang.Hou at nxp.com (Zhiqiang Hou)
Date: Thu, 19 Mar 2020 13:38:43 +0800
Subject: [PATCH 09/12] board: fsl: ls1028a: Initialize the GIC redistributor
 tables
In-Reply-To: <20200319053846.2304-1-Zhiqiang.Hou@nxp.com>
References: <20200319053846.2304-1-Zhiqiang.Hou@nxp.com>
Message-ID: <20200319053846.2304-10-Zhiqiang.Hou@nxp.com>

From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

Fixup kernel DT to reserve memory for GIC redistributor tables,
and initialize the redistributor configuration and pending
tables using the reserved memory.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
 board/freescale/ls1028a/ls1028a.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index aa93534ac6..5a89d37629 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
 #include <malloc.h>
 #include <errno.h>
 #include <fsl_ddr.h>
@@ -11,6 +12,7 @@
 #include <hwconfig.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <env_internal.h>
 #include <asm/arch-fsl-layerscape/soc.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
@@ -19,6 +21,7 @@
 #ifdef CONFIG_FSL_LS_PPA
 #include <asm/arch/ppa.h>
 #endif
+#include <asm/gic-v3.h>
 #include <fsl_immap.h>
 #include <netdev.h>
 
@@ -29,6 +32,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define GIC_LPI_SIZE		0x200000
 int config_board_mux(void)
 {
 #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS)
@@ -140,6 +144,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 {
 	u64 base[CONFIG_NR_DRAM_BANKS];
 	u64 size[CONFIG_NR_DRAM_BANKS];
+	u64 gic_lpi_base;
+	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -150,6 +156,14 @@ int ft_board_setup(void *blob, bd_t *bd)
 	size[1] = gd->bd->bi_dram[1].size;
 
 #ifdef CONFIG_RESV_RAM
+#ifdef CONFIG_GIC_V3_ITS
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (!ret) {
+		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+			debug("%s: failed to init gic-lpi-tables\n", __func__);
+	}
+#endif
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&
 	    gd->arch.resv_ram < base[0] + size[0])