From patchwork Fri Mar 13 11:47:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 243615 List-Id: U-Boot discussion From: olteanv at gmail.com (Vladimir Oltean) Date: Fri, 13 Mar 2020 13:47:23 +0200 Subject: [PATCH v2] pci-host-ecam-generic: access config space independent of system-wide bus id Message-ID: <20200313114723.4626-1-olteanv@gmail.com> From: Vladimir Oltean The pci-host-ecam-generic code assumes that the ECAM is the first PCI bus in the system to be probed. Therefore, the system-wide bus number allocated by U-Boot in sequence for it is going to be zero, which corresponds to the memory-mapped config spaces found within it. Reuse the logic from other PCI bus drivers, and assume that U-Boot will allocate bus numbers in sequence for all buses within the current ECAM. So the base number of the bus needs to be subtracted when indexing the correct config space. Fixes: 3675cb044e68 ("PCI: Add driver for a 'pci-host-ecam-generic' host controller") Signed-off-by: Vladimir Oltean Reviewed-by: Alex Marginean --- Changes in v2: Rebased on top of current u-boot master. There was a trivial context difference in pci_generic_ecam_read_config. drivers/pci/pcie_ecam_generic.c | 36 +++++++++++++++++++++++++++++---- 1 file changed, 32 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c index c875f3a5b7d2..813f9687b6b3 100644 --- a/drivers/pci/pcie_ecam_generic.c +++ b/drivers/pci/pcie_ecam_generic.c @@ -19,6 +19,8 @@ */ struct generic_ecam_pcie { void *cfg_base; + pci_size_t size; + int first_busno; }; /** @@ -43,7 +45,7 @@ static int pci_generic_ecam_conf_address(const struct udevice *bus, void *addr; addr = pcie->cfg_base; - addr += PCI_BUS(bdf) << 20; + addr += (PCI_BUS(bdf) - pcie->first_busno) << 20; addr += PCI_DEV(bdf) << 15; addr += PCI_FUNC(bdf) << 12; addr += offset; @@ -52,6 +54,15 @@ static int pci_generic_ecam_conf_address(const struct udevice *bus, return 0; } +static bool pci_generic_ecam_addr_valid(struct udevice *bus, pci_dev_t bdf) +{ + struct generic_ecam_pcie *pcie = dev_get_priv(bus); + int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16); + + return (PCI_BUS(bdf) >= pcie->first_busno && + PCI_BUS(bdf) < pcie->first_busno + num_buses); +} + /** * pci_generic_ecam_read_config() - Read from configuration space * @bus: Pointer to the PCI bus @@ -68,6 +79,11 @@ static int pci_generic_ecam_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) { + if (!pci_generic_ecam_addr_valid(bus, bdf)) { + *valuep = pci_get_ff(size); + return 0; + } + return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address, bdf, offset, valuep, size); } @@ -88,6 +104,9 @@ static int pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) { + if (!pci_generic_ecam_addr_valid(bus, bdf)) + return 0; + return pci_generic_mmap_write_config(bus, pci_generic_ecam_conf_address, bdf, offset, value, size); } @@ -116,9 +135,17 @@ static int pci_generic_ecam_ofdata_to_platdata(struct udevice *dev) return err; } - pcie->cfg_base = map_physmem(reg_res.start, - fdt_resource_size(®_res), - MAP_NOCACHE); + pcie->size = fdt_resource_size(®_res); + pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE); + + return 0; +} + +static int pci_generic_ecam_probe(struct udevice *dev) +{ + struct generic_ecam_pcie *pcie = dev_get_priv(dev); + + pcie->first_busno = dev->seq; return 0; } @@ -138,6 +165,7 @@ U_BOOT_DRIVER(pci_generic_ecam) = { .id = UCLASS_PCI, .of_match = pci_generic_ecam_ids, .ops = &pci_generic_ecam_ops, + .probe = pci_generic_ecam_probe, .ofdata_to_platdata = pci_generic_ecam_ofdata_to_platdata, .priv_auto_alloc_size = sizeof(struct generic_ecam_pcie), };