From patchwork Fri Mar 6 10:14:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 243295 List-Id: U-Boot discussion From: patrick.delaunay at st.com (Patrick Delaunay) Date: Fri, 6 Mar 2020 11:14:06 +0100 Subject: [PATCH 4/9] ram: stm32mp1: tuning: add timeout for polling BISTGSR.BDDONE In-Reply-To: <20200306101412.15376-1-patrick.delaunay@st.com> References: <20200306101412.15376-1-patrick.delaunay@st.com> Message-ID: <20200306111355.4.If03eb32f9863bed008f5367b47116f667bb85099@changeid> Avoid to block the tuning procedure on BIST error (not finished BIST procedure) by adding a 1000us timeout on the polling of BISTGSR.BDDONE executed to detect the end of BIST. The normal duration of the BIST test is around 5us. This patch also cleanup comments. Signed-off-by: Patrick Delaunay Acked-by: Patrice Chotard --- drivers/ram/stm32mp1/stm32mp1_tuning.c | 45 ++++++++++++++------------ 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/ram/stm32mp1/stm32mp1_tuning.c b/drivers/ram/stm32mp1/stm32mp1_tuning.c index e3e6f0f79c..cab6cf087a 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tuning.c +++ b/drivers/ram/stm32mp1/stm32mp1_tuning.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "stm32mp1_ddr_regs.h" #include "stm32mp1_ddr.h" @@ -246,6 +247,8 @@ static void BIST_test(struct stm32mp1_ddrphy *phy, u8 byte, bool result = true; /* BIST_SUCCESS */ u32 cnt = 0; u32 error = 0; + u32 val; + int ret; bist->test_result = true; @@ -274,27 +277,29 @@ run: 0x00000001); /* Write BISTRR.BINST = 3?b001; */ - /* Wait for a number of CTL clocks before reading BIST register*/ - /* Wait 300 ctl_clk cycles; ... IS it really needed?? */ - /* Perform BIST Instruction Stop*/ - /* Write BISTRR.BINST = 3?b010;*/ - - /* poll on BISTGSR.BDONE. If 0, wait. ++TODO Add timeout */ - while (!(readl(&phy->bistgsr) & DDRPHYC_BISTGSR_BDDONE)) - ; - - /*Check if received correct number of words*/ - /* if (Read BISTWCSR.DXWCNT = Read BISTWCR.BWCNT) */ - if (((readl(&phy->bistwcsr)) >> DDRPHYC_BISTWCSR_DXWCNT_SHIFT) == - readl(&phy->bistwcr)) { - /*Determine if there is a data comparison error*/ - /* if (Read BISTGSR.BDXERR = 1?b0) */ - if (readl(&phy->bistgsr) & DDRPHYC_BISTGSR_BDXERR) - result = false; /* BIST_FAIL; */ - else - result = true; /* BIST_SUCCESS; */ - } else { + /* poll on BISTGSR.BDONE and wait max 1000 us */ + ret = readl_poll_timeout(&phy->bistgsr, val, + val & DDRPHYC_BISTGSR_BDDONE, 1000); + + if (ret < 0) { + printf("warning: BIST timeout\n"); result = false; /* BIST_FAIL; */ + /*Perform BIST Stop */ + clrsetbits_le32(&phy->bistrr, 0x00000007, 0x00000002); + } else { + /*Check if received correct number of words*/ + /* if (Read BISTWCSR.DXWCNT = Read BISTWCR.BWCNT) */ + if (((readl(&phy->bistwcsr)) >> DDRPHYC_BISTWCSR_DXWCNT_SHIFT) + == readl(&phy->bistwcr)) { + /*Determine if there is a data comparison error*/ + /* if (Read BISTGSR.BDXERR = 1?b0) */ + if (readl(&phy->bistgsr) & DDRPHYC_BISTGSR_BDXERR) + result = false; /* BIST_FAIL; */ + else + result = true; /* BIST_SUCCESS; */ + } else { + result = false; /* BIST_FAIL; */ + } } /* loop while success */