diff mbox series

[1/9] ram: stm32mp1: increase vdd2_ddr: buck2 for 32bits LPDDR

Message ID 20200306111355.1.Ifeb02af238a2e3d0407465a868761e5efd7f968b@changeid
State Accepted
Commit e9a20f8a198c11a4108ca4b4deef8398f0cd93aa
Headers show
Series ram: stm32mp1: fixes | expand

Commit Message

Patrick Delaunay March 6, 2020, 10:14 a.m. UTC
Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2
form 1.2V to 1.25V for 32bits configuration.

Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
---

 arch/arm/mach-stm32mp/include/mach/ddr.h |  6 +++--
 board/st/stm32mp1/board.c                | 23 ++++++++++++++----
 drivers/ram/stm32mp1/stm32mp1_ddr.c      | 30 ++++++++++++++++++++----
 include/power/stpmic1.h                  |  1 +
 4 files changed, 49 insertions(+), 11 deletions(-)

Comments

Patrice CHOTARD March 18, 2020, 9:39 a.m. UTC | #1
On 3/6/20 11:14 AM, Patrick Delaunay wrote:
> Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2
> form 1.2V to 1.25V for 32bits configuration.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
> ---
>
>  arch/arm/mach-stm32mp/include/mach/ddr.h |  6 +++--
>  board/st/stm32mp1/board.c                | 23 ++++++++++++++----
>  drivers/ram/stm32mp1/stm32mp1_ddr.c      | 30 ++++++++++++++++++++----
>  include/power/stpmic1.h                  |  1 +
>  4 files changed, 49 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/include/mach/ddr.h b/arch/arm/mach-stm32mp/include/mach/ddr.h
> index b8a17cfbdd..bfc42a7c48 100644
> --- a/arch/arm/mach-stm32mp/include/mach/ddr.h
> +++ b/arch/arm/mach-stm32mp/include/mach/ddr.h
> @@ -9,8 +9,10 @@
>  /* DDR power initializations */
>  enum ddr_type {
>  	STM32MP_DDR3,
> -	STM32MP_LPDDR2,
> -	STM32MP_LPDDR3,
> +	STM32MP_LPDDR2_16,
> +	STM32MP_LPDDR2_32,
> +	STM32MP_LPDDR3_16,
> +	STM32MP_LPDDR3_32,
>  };
>  
>  int board_ddr_power_init(enum ddr_type ddr_type);
> diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c
> index c3d832f584..4e35d36c76 100644
> --- a/board/st/stm32mp1/board.c
> +++ b/board/st/stm32mp1/board.c
> @@ -43,6 +43,7 @@ int board_ddr_power_init(enum ddr_type ddr_type)
>  	struct udevice *dev;
>  	bool buck3_at_1800000v = false;
>  	int ret;
> +	u32 buck2;
>  
>  	ret = uclass_get_device_by_driver(UCLASS_PMIC,
>  					  DM_GET_DRIVER(pmic_stpmic1), &dev);
> @@ -102,8 +103,10 @@ int board_ddr_power_init(enum ddr_type ddr_type)
>  
>  		break;
>  
> -	case STM32MP_LPDDR2:
> -	case STM32MP_LPDDR3:
> +	case STM32MP_LPDDR2_16:
> +	case STM32MP_LPDDR2_32:
> +	case STM32MP_LPDDR3_16:
> +	case STM32MP_LPDDR3_32:
>  		/*
>  		 * configure VDD_DDR1 = LDO3
>  		 * Set LDO3 to 1.8V
> @@ -133,11 +136,23 @@ int board_ddr_power_init(enum ddr_type ddr_type)
>  		if (ret < 0)
>  			return ret;
>  
> -		/* VDD_DDR2 : Set BUCK2 to 1.2V */
> +		/* VDD_DDR2 : Set BUCK2 to 1.2V (16bits) or 1.25V (32 bits)*/
> +		switch (ddr_type) {
> +		case STM32MP_LPDDR2_32:
> +		case STM32MP_LPDDR3_32:
> +			buck2 = STPMIC1_BUCK2_1250000V;
> +			break;
> +		default:
> +		case STM32MP_LPDDR2_16:
> +		case STM32MP_LPDDR3_16:
> +			buck2 = STPMIC1_BUCK2_1200000V;
> +			break;
> +		}
> +
>  		ret = pmic_clrsetbits(dev,
>  				      STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2),
>  				      STPMIC1_BUCK_VOUT_MASK,
> -				      STPMIC1_BUCK2_1200000V);
> +				      buck2);
>  		if (ret < 0)
>  			return ret;
>  
> diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> index d765a46f7c..a87914f2d5 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> @@ -668,14 +668,34 @@ void stm32mp1_ddr_init(struct ddr_info *priv,
>  {
>  	u32 pir;
>  	int ret = -EINVAL;
> +	char bus_width;
> +
> +	switch (config->c_reg.mstr & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK) {
> +	case DDRCTRL_MSTR_DATA_BUS_WIDTH_QUARTER:
> +		bus_width = 8;
> +		break;
> +	case DDRCTRL_MSTR_DATA_BUS_WIDTH_HALF:
> +		bus_width = 16;
> +		break;
> +	default:
> +		bus_width = 32;
> +		break;
> +	}
> +
>  
>  	if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3)
>  		ret = board_ddr_power_init(STM32MP_DDR3);
> -	else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2)
> -		ret = board_ddr_power_init(STM32MP_LPDDR2);
> -	else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3)
> -		ret = board_ddr_power_init(STM32MP_LPDDR3);
> -
> +	else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) {
> +		if (bus_width == 32)
> +			ret = board_ddr_power_init(STM32MP_LPDDR2_32);
> +		else
> +			ret = board_ddr_power_init(STM32MP_LPDDR2_16);
> +	} else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) {
> +		if (bus_width == 32)
> +			ret = board_ddr_power_init(STM32MP_LPDDR3_32);
> +		else
> +			ret = board_ddr_power_init(STM32MP_LPDDR3_16);
> +	}
>  	if (ret)
>  		panic("ddr power init failed\n");
>  
> diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h
> index dc8b5a7459..1493a677f0 100644
> --- a/include/power/stpmic1.h
> +++ b/include/power/stpmic1.h
> @@ -37,6 +37,7 @@
>  #define STPMIC1_BUCK_VOUT(sel)		(sel << STPMIC1_BUCK_VOUT_SHIFT)
>  
>  #define STPMIC1_BUCK2_1200000V		STPMIC1_BUCK_VOUT(24)
> +#define STPMIC1_BUCK2_1250000V		STPMIC1_BUCK_VOUT(26)
>  #define STPMIC1_BUCK2_1350000V		STPMIC1_BUCK_VOUT(30)
>  
>  #define STPMIC1_BUCK3_1800000V		STPMIC1_BUCK_VOUT(39)

Acked-by: Patrice Chotard <patrice.chotard at st.com>

Thanks

Patrice
Patrick Delaunay March 24, 2020, 8:48 a.m. UTC | #2
Hi,

> From: Patrick DELAUNAY <patrick.delaunay at st.com>
> Sent: vendredi 6 mars 2020 11:14
> 
> Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2 form 1.2V to
> 1.25V for 32bits configuration.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
> ---

Applied to u-boot-stm/next, thanks!

Regards

Patrick
diff mbox series

Patch

diff --git a/arch/arm/mach-stm32mp/include/mach/ddr.h b/arch/arm/mach-stm32mp/include/mach/ddr.h
index b8a17cfbdd..bfc42a7c48 100644
--- a/arch/arm/mach-stm32mp/include/mach/ddr.h
+++ b/arch/arm/mach-stm32mp/include/mach/ddr.h
@@ -9,8 +9,10 @@ 
 /* DDR power initializations */
 enum ddr_type {
 	STM32MP_DDR3,
-	STM32MP_LPDDR2,
-	STM32MP_LPDDR3,
+	STM32MP_LPDDR2_16,
+	STM32MP_LPDDR2_32,
+	STM32MP_LPDDR3_16,
+	STM32MP_LPDDR3_32,
 };
 
 int board_ddr_power_init(enum ddr_type ddr_type);
diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c
index c3d832f584..4e35d36c76 100644
--- a/board/st/stm32mp1/board.c
+++ b/board/st/stm32mp1/board.c
@@ -43,6 +43,7 @@  int board_ddr_power_init(enum ddr_type ddr_type)
 	struct udevice *dev;
 	bool buck3_at_1800000v = false;
 	int ret;
+	u32 buck2;
 
 	ret = uclass_get_device_by_driver(UCLASS_PMIC,
 					  DM_GET_DRIVER(pmic_stpmic1), &dev);
@@ -102,8 +103,10 @@  int board_ddr_power_init(enum ddr_type ddr_type)
 
 		break;
 
-	case STM32MP_LPDDR2:
-	case STM32MP_LPDDR3:
+	case STM32MP_LPDDR2_16:
+	case STM32MP_LPDDR2_32:
+	case STM32MP_LPDDR3_16:
+	case STM32MP_LPDDR3_32:
 		/*
 		 * configure VDD_DDR1 = LDO3
 		 * Set LDO3 to 1.8V
@@ -133,11 +136,23 @@  int board_ddr_power_init(enum ddr_type ddr_type)
 		if (ret < 0)
 			return ret;
 
-		/* VDD_DDR2 : Set BUCK2 to 1.2V */
+		/* VDD_DDR2 : Set BUCK2 to 1.2V (16bits) or 1.25V (32 bits)*/
+		switch (ddr_type) {
+		case STM32MP_LPDDR2_32:
+		case STM32MP_LPDDR3_32:
+			buck2 = STPMIC1_BUCK2_1250000V;
+			break;
+		default:
+		case STM32MP_LPDDR2_16:
+		case STM32MP_LPDDR3_16:
+			buck2 = STPMIC1_BUCK2_1200000V;
+			break;
+		}
+
 		ret = pmic_clrsetbits(dev,
 				      STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2),
 				      STPMIC1_BUCK_VOUT_MASK,
-				      STPMIC1_BUCK2_1200000V);
+				      buck2);
 		if (ret < 0)
 			return ret;
 
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c
index d765a46f7c..a87914f2d5 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
@@ -668,14 +668,34 @@  void stm32mp1_ddr_init(struct ddr_info *priv,
 {
 	u32 pir;
 	int ret = -EINVAL;
+	char bus_width;
+
+	switch (config->c_reg.mstr & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK) {
+	case DDRCTRL_MSTR_DATA_BUS_WIDTH_QUARTER:
+		bus_width = 8;
+		break;
+	case DDRCTRL_MSTR_DATA_BUS_WIDTH_HALF:
+		bus_width = 16;
+		break;
+	default:
+		bus_width = 32;
+		break;
+	}
+
 
 	if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3)
 		ret = board_ddr_power_init(STM32MP_DDR3);
-	else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2)
-		ret = board_ddr_power_init(STM32MP_LPDDR2);
-	else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3)
-		ret = board_ddr_power_init(STM32MP_LPDDR3);
-
+	else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) {
+		if (bus_width == 32)
+			ret = board_ddr_power_init(STM32MP_LPDDR2_32);
+		else
+			ret = board_ddr_power_init(STM32MP_LPDDR2_16);
+	} else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) {
+		if (bus_width == 32)
+			ret = board_ddr_power_init(STM32MP_LPDDR3_32);
+		else
+			ret = board_ddr_power_init(STM32MP_LPDDR3_16);
+	}
 	if (ret)
 		panic("ddr power init failed\n");
 
diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h
index dc8b5a7459..1493a677f0 100644
--- a/include/power/stpmic1.h
+++ b/include/power/stpmic1.h
@@ -37,6 +37,7 @@ 
 #define STPMIC1_BUCK_VOUT(sel)		(sel << STPMIC1_BUCK_VOUT_SHIFT)
 
 #define STPMIC1_BUCK2_1200000V		STPMIC1_BUCK_VOUT(24)
+#define STPMIC1_BUCK2_1250000V		STPMIC1_BUCK_VOUT(26)
 #define STPMIC1_BUCK2_1350000V		STPMIC1_BUCK_VOUT(30)
 
 #define STPMIC1_BUCK3_1800000V		STPMIC1_BUCK_VOUT(39)